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# Ignore generated package file
hdl/pkg_version.vhd
include::doc/main.adoc[]
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\ No newline at end of file
= COMBPM module documentation
// ================================================================================
== Description
This module provides several logic blocks to allow communication with BPM (Beam Position Monitor) electronics.
This has been built for a very precise situation (libera electron, damc-fmc2zup), but the architecture should allow modification and portability.
For now, it only provides RX communication from the DLS CC protocol (ITech libera electron).
The module has been designed for DAMC-FMC2ZUP targets, populated with a 4SFP+ FMC board (CAENels).
// ================================================================================
== Overview
=== Main operation: Top level
The basics of this module is in three blocs that are essentials for the application.
* *Transceiver bloc*. Used to deserialize the communication stream from the BPM. +
_For now it is a Xilinx GTWizard, configured for the Libera Electron DLS CC protocol specs (2Gbps, 16b words...)._
_This is tied to a specific transceiver input of the FPGA._
* *Protocol decoder bloc*. From the deserialized words, it decode the stream and get the essential data (BPM number, position, timestamp...).
It outputs it on a AXI-Stream interface. +
_For now, it parses Libera Electron DLS CC._
* *AXI-MM register interface*. Used to configure and monitor everything from an AXI-MM interface (CPU).
These three blocs are depicted in the image below.
It is to note that the clock domain used is the data clock, even for the register interface.
This clock is provided and can be used to clock the rest of the application and/or clock CDC on the AXI-MM and AXIS interface. +
_The actual __top_combpm_electron.vhd__ file provides these three blocs configured and connected for the Libera Electron and damc-fmc2zup application._
.Basic overview of combpm module
image::images/overview.svg[]
=== Additionnal blocs
The module provide additionnal blocs usefull for the application.
* Packet filter
=== Package
A package describing the AXIS packet at the module output is present.
It helps to automatically pack or unpack the packet (functions _bpmpacket2slv()_ or _slv2bpmpacket()_ ).
A zero packet (_C_BPMPACKET_ZERO) is also declared.
.t_bpmpacket record type
[cols="1,1,1"]
[%autowidth]
|===
|Member name | Type | Description
|pos_x | std_logic_vector(31 downto 0) | X position
|pos_y | std_logic_vector(31 downto 0) | Y position
|bpm_id | std_logic_vector(15 downto 0) | ID of the source BPM
|mc_timestamp | std_logic_vector(39 downto 0) | Timestamp at machine clock frequency
|fa_seq | std_logic_vector(7 downto 0) | FA sequence number, LSB only
|===
.Some usage of pkg_bpmpacket.vhd
[example]
[source,vhdl]
----
signal my_packet : t_bpmpacket;
(...)
my_packet <= slv2bpmpacket(axis_tdata); -- Convert from AXIS tdata to a BPM packet
id <= my_packet.bpm_id; -- Access packet fields
pos_x <= my_packet.pos_x;
axis_tdata_o <= bpmpacket(my_packet); -- Convert back to logic vector for AXIS tdata
----
// ================================================================================
== Details
=== Protocol decoder (electron)
* CRC check. If fails: drop the frame, pulse frame_error output and increase the error counter.
* Counts and gives the number of frame in the last DLS CC sequence receive.
* DLS CC Sequence number check. If discontinuous: pulse seq_discontinuity output and increase
=== BPM packet AXIS stream
The AXIS data provided by the protocol decoder is descibed in the file _pkg_bpmpacket_stream.vhd_.
See this file to have up to date fields info.
* Packets are not cut into packets (TLAST always '1').
* No FIFO on output (TREADY is not used).
The application needs to either implement FIFO or accepts every packet (AXIS packet).
The packet rate depends on the signal input.
=== Transceivers
The TCL script combpm_gtwizard.tcl is used to create the GTWizard IP, wich is instanciated in the top level.
=== AXI-MM register interface
We use DESYRDL to generate a AXI4L slave decoder.
=== Packet filter
This block can drop BPM packets from the AXIS by looking up their BPM_ID field.
A simple memory block is used and programmed via the AXI-MM interface.
The block is adressed by the BPM ID (0 to 255).
The msb (bit 7) gives the forward signal.
If '1' then the packet is transfered, else it is blocked.
The 6 lsb (bit 6-0) is filled into the TDEST field of the AXIS stream.
This can be used to further routing.
.Structural schematic of combpm_packet_filter.
image::images/combpm_packet_filter.svg[]
// ================================================================================
== Registers map
include::regmap.adoc[]
// ================================================================================
== TODO/Future of this module
* Add configuration feature to allow the choice of the transceiver (for now only X0Y4 GTH).
* The application should be able to instanciate several transceiver interface, with one decoder for each.
* At SOLEIL, the BPM electronics will change by 2025.
At that point, it will be necessary to change the *Transceivers* and *Protocol decoder* blocs to match the new equipments.
.Registers
[.tab-addr-reg,cols="5,1,1,2,1,9"]
|===
|Name | N | bits | type | RW | Description
| ID | 1 | 32 | uint | RO | +++Module identifier.+++
| VERSION | 1 | 32 | uint | RO | +++Module version.+++
| SFP | 1 | 2 | bitfields | RO | +++SFP module status+++ +
- RXLOS [0:0] sw:RO uint : +++RX lost signal+++ +
- MODABS [1:1] sw:RO uint : +++Module is absent+++
| GT | 1 | 11 | bitfields | RW | +++GT transceivers status and control+++ +
- POWERGOOD [0:0] sw:RO uint : +++Powergood signal+++ +
- QPLLLOCK [1:1] sw:RO uint : +++PLL lock signal+++ +
- RXCLKACTIVE [2:2] sw:RO uint : +++RX clk active signal+++ +
- RXCDRLOCK [3:3] sw:RO uint : +++RX CDR lock signal+++ +
- RXRESETDONE [4:4] sw:RO uint : +++RX reset done signal+++ +
- RXBYTEISALIGNED [5:5] sw:RO uint : +++RX byte is aligned signal+++ +
- RXBYTEREALIGN [6:6] sw:RO uint : +++RX byte realign signal+++ +
- RXCOMMADET [7:7] sw:RO uint : +++RX comma detected signal+++ +
- RXCOMMADETEN [8:8] sw:RW uint : +++RX comma detection enable signal+++ +
- RXRSTDATAPATH [9:9] sw:RW uint : +++Reset RX datapath+++ +
- RXRSTPLLDATAPATH [10:10] sw:RW uint : +++Reset RX PLL and datapath+++
| PROTOCOL | 1 | 4 | bitfields | RW | +++BPM protocol status and control+++ +
- FRAMEERROR [0:0] sw:RO uint : +++Frame error+++ +
- SEQFRAMECNTERROR [1:1] sw:RO uint : +++Sequence frame count mismatch+++ +
- SEQFRAMEDISCONT [2:2] sw:RO uint : +++Sequence frame discontinuity+++ +
- SOFTRESET [3:3] sw:RW uint : +++Soft reset+++
| VALIDFRAMECNT | 1 | 32 | uint | RO | +++BPM protocol valid frame counters+++
| INVALIDFRAMECNT | 1 | 32 | uint | RO | +++BPM protocol invalid frame counters+++
| VALIDFRAMERATE | 1 | 32 | uint | RO | +++BPM protocol valid frame rate+++
| INVALIDFRAMERATE | 1 | 32 | uint | RO | +++BPM protocol invalid frame rate+++
| FRAMESEQ | 1 | 16 | uint | RO | +++BPM protocol frame sequence+++
|===
library ieee;
use ieee.std_logic_1164.all;
library UNISIM;
use UNISIM.vcomponents.all;
entity combpm_gtsfp_caenelsfmc4sfp is
port(
-- 100MHz clock, main ref clock
clk_100 : in std_logic;
-- User clock provided by GT
usrclk : out std_logic;
-- Async reset active low
rst_n : in std_logic;
-- Differential reference clock inputs
mgtrefclk_p : in std_logic;
mgtrefclk_n : in std_logic;
-- SFP01 interface
sfp01_txn : out std_logic;
sfp01_rxn : in std_logic;
sfp01_txp : out std_logic;
sfp01_rxp : in std_logic;
sfp01_rx_los : in std_logic;
sfp01_mod_abs : in std_logic;
sfp01_tx_disable : out std_logic;
sfp01_tx_fault : in std_logic;
-- GT01 interface
gt01_datarx : out std_logic_vector(15 downto 0);
gt01_datatx : in std_logic_vector(15 downto 0);
gt01_powergood : out std_logic;
gt01_qplllock : out std_logic;
gt01_txclkactive : out std_logic;
gt01_rxclkactive : out std_logic;
gt01_txresetdone : out std_logic;
gt01_rxresetdone : out std_logic;
gt01_rxcdrlock : out std_logic;
gt01_rxbyteisaligned : out std_logic;
gt01_rxbyterealign : out std_logic;
gt01_rxcommadet : out std_logic;
gt01_txfault : out std_logic;
gt01_rxlos : out std_logic;
gt01_modabs : out std_logic;
gt01_rstall : in std_logic;
gt01_rxcommadeten : in std_logic;
gt01_txdisable : in std_logic;
-- SFP02 interface
sfp02_txn : out std_logic;
sfp02_rxn : in std_logic;
sfp02_txp : out std_logic;
sfp02_rxp : in std_logic;
sfp02_rx_los : in std_logic;
sfp02_mod_abs : in std_logic;
sfp02_tx_disable : out std_logic;
sfp02_tx_fault : in std_logic;
-- GT02 interface
gt02_datarx : out std_logic_vector(15 downto 0);
gt02_datatx : in std_logic_vector(15 downto 0);
gt02_powergood : out std_logic;
gt02_qplllock : out std_logic;
gt02_txclkactive : out std_logic;
gt02_rxclkactive : out std_logic;
gt02_txresetdone : out std_logic;
gt02_rxresetdone : out std_logic;
gt02_rxcdrlock : out std_logic;
gt02_rxbyteisaligned : out std_logic;
gt02_rxbyterealign : out std_logic;
gt02_rxcommadet : out std_logic;
gt02_txfault : out std_logic;
gt02_rxlos : out std_logic;
gt02_modabs : out std_logic;
gt02_rstall : in std_logic;
gt02_rxcommadeten : in std_logic;
gt02_txdisable : in std_logic;
-- SFP03 interface
sfp03_txn : out std_logic;
sfp03_rxn : in std_logic;
sfp03_txp : out std_logic;
sfp03_rxp : in std_logic;
sfp03_rx_los : in std_logic;
sfp03_mod_abs : in std_logic;
sfp03_tx_disable : out std_logic;
sfp03_tx_fault : in std_logic;
-- GT03 interface
gt03_datarx : out std_logic_vector(15 downto 0);
gt03_datatx : in std_logic_vector(15 downto 0);
gt03_powergood : out std_logic;
gt03_qplllock : out std_logic;
gt03_txclkactive : out std_logic;
gt03_rxclkactive : out std_logic;
gt03_txresetdone : out std_logic;
gt03_rxresetdone : out std_logic;
gt03_rxcdrlock : out std_logic;
gt03_rxbyteisaligned : out std_logic;
gt03_rxbyterealign : out std_logic;
gt03_rxcommadet : out std_logic;
gt03_txfault : out std_logic;
gt03_rxlos : out std_logic;
gt03_modabs : out std_logic;
gt03_rstall : in std_logic;
gt03_rxcommadeten : in std_logic;
gt03_txdisable : in std_logic;
-- SFP04 interface
sfp04_txn : out std_logic;
sfp04_rxn : in std_logic;
sfp04_txp : out std_logic;
sfp04_rxp : in std_logic;
sfp04_rx_los : in std_logic;
sfp04_mod_abs : in std_logic;
sfp04_tx_disable : out std_logic;
sfp04_tx_fault : in std_logic;
-- GT04 interface
gt04_datarx : out std_logic_vector(15 downto 0);
gt04_datatx : in std_logic_vector(15 downto 0);
gt04_powergood : out std_logic;
gt04_qplllock : out std_logic;
gt04_txclkactive : out std_logic;
gt04_rxclkactive : out std_logic;
gt04_txresetdone : out std_logic;
gt04_rxresetdone : out std_logic;
gt04_rxcdrlock : out std_logic;
gt04_rxbyteisaligned : out std_logic;
gt04_rxbyterealign : out std_logic;
gt04_rxcommadet : out std_logic;
gt04_txfault : out std_logic;
gt04_rxlos : out std_logic;
gt04_modabs : out std_logic;
gt04_rstall : in std_logic;
gt04_rxcommadeten : in std_logic;
gt04_txdisable : in std_logic
);
end combpm_gtsfp_caenelsfmc4sfp;
architecture rtl of combpm_gtsfp_caenelsfmc4sfp is
--------------------------------
-- INTERFACE PORT ASSOCIATION --
--------------------------------
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_PARAMETER : STRING;
ATTRIBUTE X_INTERFACE_INFO of clk_100 : SIGNAL is "xilinx.com:signal:clock:1.0 clk_100 CLK";
ATTRIBUTE X_INTERFACE_PARAMETER of clk_100 : SIGNAL is "FREQ 100000000";
ATTRIBUTE X_INTERFACE_INFO of rst_n : SIGNAL is "xilinx.com:signal:reset:1.0 rst_n RST";
ATTRIBUTE X_INTERFACE_PARAMETER of rst_n : SIGNAL is "POLARITY ACTIVE_LOW";
ATTRIBUTE X_INTERFACE_INFO of sfp01_txn : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP01 TXN";
ATTRIBUTE X_INTERFACE_INFO of sfp01_rxn : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP01 RXN";
ATTRIBUTE X_INTERFACE_INFO of sfp01_txp : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP01 TXP";
ATTRIBUTE X_INTERFACE_INFO of sfp01_rxp : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP01 RXP";
ATTRIBUTE X_INTERFACE_INFO of sfp01_rx_los : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP01 RX_LOS";
ATTRIBUTE X_INTERFACE_INFO of sfp01_mod_abs : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP01 MOD_ABS";
ATTRIBUTE X_INTERFACE_INFO of sfp01_tx_disable : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP01 TX_DISABLE";
ATTRIBUTE X_INTERFACE_INFO of sfp01_tx_fault : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP01 TX_FAULT";
ATTRIBUTE X_INTERFACE_INFO of gt01_datarx : SIGNAL is "soleil:user:gtsfp:1.0 GT01 datarx";
ATTRIBUTE X_INTERFACE_INFO of gt01_datatx : SIGNAL is "soleil:user:gtsfp:1.0 GT01 datatx";
ATTRIBUTE X_INTERFACE_INFO of gt01_powergood : SIGNAL is "soleil:user:gtsfp:1.0 GT01 powergood";
ATTRIBUTE X_INTERFACE_INFO of gt01_qplllock : SIGNAL is "soleil:user:gtsfp:1.0 GT01 qplllock";
ATTRIBUTE X_INTERFACE_INFO of gt01_txclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT01 txclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt01_rxclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rxclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt01_txresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT01 txresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt01_rxresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rxresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt01_rxcdrlock : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rxcdrlock";
ATTRIBUTE X_INTERFACE_INFO of gt01_rxbyteisaligned : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rxbyteisaligned";
ATTRIBUTE X_INTERFACE_INFO of gt01_rxbyterealign : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rxbyterealign";
ATTRIBUTE X_INTERFACE_INFO of gt01_rxcommadet : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rxcommadet";
ATTRIBUTE X_INTERFACE_INFO of gt01_txfault : SIGNAL is "soleil:user:gtsfp:1.0 GT01 txfault";
ATTRIBUTE X_INTERFACE_INFO of gt01_rxlos : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rxlos";
ATTRIBUTE X_INTERFACE_INFO of gt01_modabs : SIGNAL is "soleil:user:gtsfp:1.0 GT01 modabs";
ATTRIBUTE X_INTERFACE_INFO of gt01_rstall : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rstall";
ATTRIBUTE X_INTERFACE_INFO of gt01_rxcommadeten : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rxcommadeten";
ATTRIBUTE X_INTERFACE_INFO of gt01_txdisable : SIGNAL is "soleil:user:gtsfp:1.0 GT01 txdisable";
ATTRIBUTE X_INTERFACE_INFO of sfp02_txn : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP02 TXN";
ATTRIBUTE X_INTERFACE_INFO of sfp02_rxn : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP02 RXN";
ATTRIBUTE X_INTERFACE_INFO of sfp02_txp : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP02 TXP";
ATTRIBUTE X_INTERFACE_INFO of sfp02_rxp : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP02 RXP";
ATTRIBUTE X_INTERFACE_INFO of sfp02_rx_los : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP02 RX_LOS";
ATTRIBUTE X_INTERFACE_INFO of sfp02_mod_abs : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP02 MOD_ABS";
ATTRIBUTE X_INTERFACE_INFO of sfp02_tx_disable : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP02 TX_DISABLE";
ATTRIBUTE X_INTERFACE_INFO of sfp02_tx_fault : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP02 TX_FAULT";
ATTRIBUTE X_INTERFACE_INFO of gt02_datarx : SIGNAL is "soleil:user:gtsfp:1.0 GT02 datarx";
ATTRIBUTE X_INTERFACE_INFO of gt02_datatx : SIGNAL is "soleil:user:gtsfp:1.0 GT02 datatx";
ATTRIBUTE X_INTERFACE_INFO of gt02_powergood : SIGNAL is "soleil:user:gtsfp:1.0 GT02 powergood";
ATTRIBUTE X_INTERFACE_INFO of gt02_qplllock : SIGNAL is "soleil:user:gtsfp:1.0 GT02 qplllock";
ATTRIBUTE X_INTERFACE_INFO of gt02_txclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT02 txclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt02_rxclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rxclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt02_txresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT02 txresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt02_rxresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rxresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt02_rxcdrlock : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rxcdrlock";
ATTRIBUTE X_INTERFACE_INFO of gt02_rxbyteisaligned : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rxbyteisaligned";
ATTRIBUTE X_INTERFACE_INFO of gt02_rxbyterealign : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rxbyterealign";
ATTRIBUTE X_INTERFACE_INFO of gt02_rxcommadet : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rxcommadet";
ATTRIBUTE X_INTERFACE_INFO of gt02_txfault : SIGNAL is "soleil:user:gtsfp:1.0 GT02 txfault";
ATTRIBUTE X_INTERFACE_INFO of gt02_rxlos : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rxlos";
ATTRIBUTE X_INTERFACE_INFO of gt02_modabs : SIGNAL is "soleil:user:gtsfp:1.0 GT02 modabs";
ATTRIBUTE X_INTERFACE_INFO of gt02_rstall : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rstall";
ATTRIBUTE X_INTERFACE_INFO of gt02_rxcommadeten : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rxcommadeten";
ATTRIBUTE X_INTERFACE_INFO of gt02_txdisable : SIGNAL is "soleil:user:gtsfp:1.0 GT02 txdisable";
ATTRIBUTE X_INTERFACE_INFO of sfp03_txn : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP03 TXN";
ATTRIBUTE X_INTERFACE_INFO of sfp03_rxn : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP03 RXN";
ATTRIBUTE X_INTERFACE_INFO of sfp03_txp : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP03 TXP";
ATTRIBUTE X_INTERFACE_INFO of sfp03_rxp : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP03 RXP";
ATTRIBUTE X_INTERFACE_INFO of sfp03_rx_los : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP03 RX_LOS";
ATTRIBUTE X_INTERFACE_INFO of sfp03_mod_abs : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP03 MOD_ABS";
ATTRIBUTE X_INTERFACE_INFO of sfp03_tx_disable : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP03 TX_DISABLE";
ATTRIBUTE X_INTERFACE_INFO of sfp03_tx_fault : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP03 TX_FAULT";
ATTRIBUTE X_INTERFACE_INFO of gt03_datarx : SIGNAL is "soleil:user:gtsfp:1.0 GT03 datarx";
ATTRIBUTE X_INTERFACE_INFO of gt03_datatx : SIGNAL is "soleil:user:gtsfp:1.0 GT03 datatx";
ATTRIBUTE X_INTERFACE_INFO of gt03_powergood : SIGNAL is "soleil:user:gtsfp:1.0 GT03 powergood";
ATTRIBUTE X_INTERFACE_INFO of gt03_qplllock : SIGNAL is "soleil:user:gtsfp:1.0 GT03 qplllock";
ATTRIBUTE X_INTERFACE_INFO of gt03_txclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT03 txclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt03_rxclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rxclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt03_txresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT03 txresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt03_rxresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rxresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt03_rxcdrlock : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rxcdrlock";
ATTRIBUTE X_INTERFACE_INFO of gt03_rxbyteisaligned : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rxbyteisaligned";
ATTRIBUTE X_INTERFACE_INFO of gt03_rxbyterealign : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rxbyterealign";
ATTRIBUTE X_INTERFACE_INFO of gt03_rxcommadet : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rxcommadet";
ATTRIBUTE X_INTERFACE_INFO of gt03_txfault : SIGNAL is "soleil:user:gtsfp:1.0 GT03 txfault";
ATTRIBUTE X_INTERFACE_INFO of gt03_rxlos : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rxlos";
ATTRIBUTE X_INTERFACE_INFO of gt03_modabs : SIGNAL is "soleil:user:gtsfp:1.0 GT03 modabs";
ATTRIBUTE X_INTERFACE_INFO of gt03_rstall : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rstall";
ATTRIBUTE X_INTERFACE_INFO of gt03_rxcommadeten : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rxcommadeten";
ATTRIBUTE X_INTERFACE_INFO of gt03_txdisable : SIGNAL is "soleil:user:gtsfp:1.0 GT03 txdisable";
ATTRIBUTE X_INTERFACE_INFO of sfp04_txn : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP04 TXN";
ATTRIBUTE X_INTERFACE_INFO of sfp04_rxn : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP04 RXN";
ATTRIBUTE X_INTERFACE_INFO of sfp04_txp : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP04 TXP";
ATTRIBUTE X_INTERFACE_INFO of sfp04_rxp : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP04 RXP";
ATTRIBUTE X_INTERFACE_INFO of sfp04_rx_los : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP04 RX_LOS";
ATTRIBUTE X_INTERFACE_INFO of sfp04_mod_abs : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP04 MOD_ABS";
ATTRIBUTE X_INTERFACE_INFO of sfp04_tx_disable : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP04 TX_DISABLE";
ATTRIBUTE X_INTERFACE_INFO of sfp04_tx_fault : SIGNAL is "xilinx.com:interface:sfp:1.0 SFP04 TX_FAULT";
ATTRIBUTE X_INTERFACE_INFO of gt04_datarx : SIGNAL is "soleil:user:gtsfp:1.0 GT04 datarx";
ATTRIBUTE X_INTERFACE_INFO of gt04_datatx : SIGNAL is "soleil:user:gtsfp:1.0 GT04 datatx";
ATTRIBUTE X_INTERFACE_INFO of gt04_powergood : SIGNAL is "soleil:user:gtsfp:1.0 GT04 powergood";
ATTRIBUTE X_INTERFACE_INFO of gt04_qplllock : SIGNAL is "soleil:user:gtsfp:1.0 GT04 qplllock";
ATTRIBUTE X_INTERFACE_INFO of gt04_txclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT04 txclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt04_rxclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rxclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt04_txresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT04 txresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt04_rxresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rxresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt04_rxcdrlock : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rxcdrlock";
ATTRIBUTE X_INTERFACE_INFO of gt04_rxbyteisaligned : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rxbyteisaligned";
ATTRIBUTE X_INTERFACE_INFO of gt04_rxbyterealign : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rxbyterealign";
ATTRIBUTE X_INTERFACE_INFO of gt04_rxcommadet : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rxcommadet";
ATTRIBUTE X_INTERFACE_INFO of gt04_txfault : SIGNAL is "soleil:user:gtsfp:1.0 GT04 txfault";
ATTRIBUTE X_INTERFACE_INFO of gt04_rxlos : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rxlos";
ATTRIBUTE X_INTERFACE_INFO of gt04_modabs : SIGNAL is "soleil:user:gtsfp:1.0 GT04 modabs";
ATTRIBUTE X_INTERFACE_INFO of gt04_rstall : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rstall";
ATTRIBUTE X_INTERFACE_INFO of gt04_rxcommadeten : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rxcommadeten";
ATTRIBUTE X_INTERFACE_INFO of gt04_txdisable : SIGNAL is "soleil:user:gtsfp:1.0 GT04 txdisable";
---------------------------
-- COMPONENT DECLARATION --
---------------------------
COMPONENT gtwizard_ultrascale_caenelsfmc4sfp
PORT (
gtwiz_userclk_tx_reset_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_tx_srcclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_tx_usrclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_tx_usrclk2_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_tx_active_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_reset_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_srcclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_usrclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_usrclk2_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_active_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_clk_freerun_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_all_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_tx_pll_and_datapath_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_tx_datapath_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_rx_pll_and_datapath_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_rx_datapath_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_rx_cdr_stable_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_tx_done_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_rx_done_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userdata_tx_in : IN STD_LOGIC_VECTOR(63 DOWNTO 0);
gtwiz_userdata_rx_out : OUT STD_LOGIC_VECTOR(63 DOWNTO 0);
gtrefclk01_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
qpll1lock_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
qpll1outclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
qpll1outrefclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gthrxn_in : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
gthrxp_in : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
rx8b10ben_in : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
rxbufreset_in : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
rxcommadeten_in : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
rxmcommaalignen_in : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
rxpcommaalignen_in : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
tx8b10ben_in : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
txctrl0_in : IN STD_LOGIC_VECTOR(63 DOWNTO 0);
txctrl1_in : IN STD_LOGIC_VECTOR(63 DOWNTO 0);
txctrl2_in : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
gthtxn_out : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
gthtxp_out : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
gtpowergood_out : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
rxbufstatus_out : OUT STD_LOGIC_VECTOR(11 DOWNTO 0);
rxbyteisaligned_out : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
rxbyterealign_out : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
rxcdrlock_out : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
rxclkcorcnt_out : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
rxcommadet_out : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
rxctrl0_out : OUT STD_LOGIC_VECTOR(63 DOWNTO 0);
rxctrl1_out : OUT STD_LOGIC_VECTOR(63 DOWNTO 0);
rxctrl2_out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
rxctrl3_out : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
rxpmaresetdone_out : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
txpmaresetdone_out : OUT STD_LOGIC_VECTOR(3 DOWNTO 0)
);
END COMPONENT;
------------------------
-- SIGNAL DECLARATION --
------------------------
signal txclkactive : std_logic;
signal rxclkactive : std_logic;
signal rstall : std_logic;
signal txresetdone : std_logic;
signal rxresetdone : std_logic;
signal qplllock : std_logic;
signal ref_clk : std_logic;
begin
---------------------
-- DIFF CLK BUFFER --
---------------------
ibufd_clkref_inst: IBUFDS_GTE4
generic map (
REFCLK_EN_TX_PATH => '0',
REFCLK_HROW_CK_SEL => "00",
REFCLK_ICNTL_RX => "00"
)
port map (
O => ref_clk,
ODIV2 => open,
CEB => '0',
I => mgtrefclk_p,
IB => mgtrefclk_n
);
--------------------
-- GLOBAL SIGNALS --
--------------------
gt01_txclkactive <= txclkactive;
gt02_txclkactive <= txclkactive;
gt03_txclkactive <= txclkactive;
gt04_txclkactive <= txclkactive;
gt01_rxclkactive <= rxclkactive;
gt02_rxclkactive <= rxclkactive;
gt03_rxclkactive <= rxclkactive;
gt04_rxclkactive <= rxclkactive;
rstall <= gt01_rstall
or gt02_rstall
or gt03_rstall
or gt04_rstall;
gt01_txresetdone <= txresetdone;
gt02_txresetdone <= txresetdone;
gt03_txresetdone <= txresetdone;
gt04_txresetdone <= txresetdone;
gt01_rxresetdone <= rxresetdone;
gt02_rxresetdone <= rxresetdone;
gt03_rxresetdone <= rxresetdone;
gt04_rxresetdone <= rxresetdone;
gt01_qplllock <= qplllock;
gt02_qplllock <= qplllock;
gt03_qplllock <= qplllock;
gt04_qplllock <= qplllock;
--------------------------
-- TRANSCEIVER INSTANCE --
--------------------------
gtwiz_inst: gtwizard_ultrascale_caenelsfmc4sfp
PORT MAP (
gtwiz_userclk_tx_reset_in => "0",
gtwiz_userclk_tx_srcclk_out => open,
gtwiz_userclk_tx_usrclk_out => open,
gtwiz_userclk_tx_usrclk2_out => open,
gtwiz_userclk_tx_active_out(0) => txclkactive,
gtwiz_userclk_rx_reset_in => "0",
gtwiz_userclk_rx_srcclk_out => open,
gtwiz_userclk_rx_usrclk_out(0) => usrclk,
gtwiz_userclk_rx_usrclk2_out => open,
gtwiz_userclk_rx_active_out(0) => rxclkactive,
gtwiz_reset_clk_freerun_in(0) => clk_100,
gtwiz_reset_all_in(0) => rstall,
gtwiz_reset_tx_pll_and_datapath_in => "0",
gtwiz_reset_tx_datapath_in => "0",
gtwiz_reset_rx_pll_and_datapath_in => "0",
gtwiz_reset_rx_datapath_in => "0",
gtwiz_reset_rx_cdr_stable_out => open,
gtwiz_reset_tx_done_out(0) => txresetdone,
gtwiz_reset_rx_done_out(0) => rxresetdone,
gtwiz_userdata_tx_in(15 downto 0) => gt03_datatx,
gtwiz_userdata_tx_in(31 downto 16) => gt02_datatx,
gtwiz_userdata_tx_in(47 downto 32) => gt04_datatx,
gtwiz_userdata_tx_in(63 downto 48) => gt01_datatx,
gtwiz_userdata_rx_out(15 downto 0) => gt03_datarx,
gtwiz_userdata_rx_out(31 downto 16) => gt02_datarx,
gtwiz_userdata_rx_out(47 downto 32) => gt04_datarx,
gtwiz_userdata_rx_out(63 downto 48) => gt01_datarx,
gtrefclk01_in(0) => ref_clk,
qpll1lock_out(0) => qplllock,
qpll1outclk_out => open,
qpll1outrefclk_out => open,
gthrxn_in(0) => sfp03_rxn,
gthrxn_in(1) => sfp02_rxn,
gthrxn_in(2) => sfp04_rxn,
gthrxn_in(3) => sfp01_rxn,
gthrxp_in(0) => sfp03_rxp,
gthrxp_in(1) => sfp02_rxp,
gthrxp_in(2) => sfp04_rxp,
gthrxp_in(3) => sfp01_rxp,
rxbufreset_in => (others => '0'),
rx8b10ben_in => (others => '1'),
rxcommadeten_in(0) => gt03_rxcommadeten,
rxcommadeten_in(1) => gt02_rxcommadeten,
rxcommadeten_in(2) => gt04_rxcommadeten,
rxcommadeten_in(3) => gt01_rxcommadeten,
rxmcommaalignen_in => (others => '1'),
rxpcommaalignen_in => (others => '1'),
tx8b10ben_in => (others => '1'),
txctrl0_in => (others => '0'),
txctrl1_in => (others => '0'),
txctrl2_in => (others => '0'),
gthtxn_out(0) => sfp03_txn,
gthtxn_out(1) => sfp02_txn,
gthtxn_out(2) => sfp04_txn,
gthtxn_out(3) => sfp01_txn,
gthtxp_out(0) => sfp03_txp,
gthtxp_out(1) => sfp02_txp,
gthtxp_out(2) => sfp04_txp,
gthtxp_out(3) => sfp01_txp,
gtpowergood_out(0) => gt03_powergood,
gtpowergood_out(1) => gt02_powergood,
gtpowergood_out(2) => gt04_powergood,
gtpowergood_out(3) => gt01_powergood,
rxbufstatus_out => open,
rxbyteisaligned_out(0) => gt03_rxbyteisaligned,
rxbyteisaligned_out(1) => gt02_rxbyteisaligned,
rxbyteisaligned_out(2) => gt04_rxbyteisaligned,
rxbyteisaligned_out(3) => gt01_rxbyteisaligned,
rxbyterealign_out(0) => gt03_rxbyterealign,
rxbyterealign_out(1) => gt02_rxbyterealign,
rxbyterealign_out(2) => gt04_rxbyterealign,
rxbyterealign_out(3) => gt01_rxbyterealign,
rxcdrlock_out(0) => gt03_rxcdrlock,
rxcdrlock_out(1) => gt02_rxcdrlock,
rxcdrlock_out(2) => gt04_rxcdrlock,
rxcdrlock_out(3) => gt01_rxcdrlock,
rxclkcorcnt_out => open,
rxcommadet_out(0) => gt03_rxcommadet,
rxcommadet_out(1) => gt02_rxcommadet,
rxcommadet_out(2) => gt04_rxcommadet,
rxcommadet_out(3) => gt01_rxcommadet,
rxctrl0_out => open,
rxctrl1_out => open,
rxctrl2_out => open,
rxctrl3_out => open,
rxpmaresetdone_out => open,
txpmaresetdone_out => open
);
----------------------
-- DIRECT CONNEXION --
----------------------
gt01_txfault <= sfp01_tx_fault;
gt02_txfault <= sfp02_tx_fault;
gt03_txfault <= sfp03_tx_fault;
gt04_txfault <= sfp04_tx_fault;
gt01_rxlos <= sfp01_rx_los;
gt02_rxlos <= sfp02_rx_los;
gt03_rxlos <= sfp03_rx_los;
gt04_rxlos <= sfp04_rx_los;
gt01_modabs <= sfp01_mod_abs;
gt02_modabs <= sfp02_mod_abs;
gt03_modabs <= sfp03_mod_abs;
gt04_modabs <= sfp04_mod_abs;
sfp01_tx_disable <= gt01_txdisable;
sfp02_tx_disable <= gt02_txdisable;
sfp03_tx_disable <= gt03_txdisable;
sfp04_tx_disable <= gt04_txdisable;
end architecture rtl;
library ieee;
use ieee.std_logic_1164.all;
library UNISIM;
use UNISIM.vcomponents.all;
entity combpm_gtsfp_htgfmc2qsfp is
port(
-- 100MHz clock, main ref clock
clk_100 : in std_logic;
-- User clock provided by GT
usrclk : out std_logic;
-- Async reset active low
rst_n : in std_logic;
-- Differential reference clock inputs
mgtrefclk_p : in std_logic;
mgtrefclk_n : in std_logic;
-- QSFP01 interface
qsfp01_tx1n : out std_logic;
qsfp01_tx1p : out std_logic;
qsfp01_rx1n : in std_logic;
qsfp01_rx1p : in std_logic;
qsfp01_tx2n : out std_logic;
qsfp01_tx2p : out std_logic;
qsfp01_rx2n : in std_logic;
qsfp01_rx2p : in std_logic;
qsfp01_tx3n : out std_logic;
qsfp01_tx3p : out std_logic;
qsfp01_rx3n : in std_logic;
qsfp01_rx3p : in std_logic;
qsfp01_tx4n : out std_logic;
qsfp01_tx4p : out std_logic;
qsfp01_rx4n : in std_logic;
qsfp01_rx4p : in std_logic;
qsfp01_modprsl : in std_logic;
qsfp01_resetn : out std_logic;
qsfp01_intl : in std_logic;
-- QSFP02 interface
qsfp02_tx1n : out std_logic;
qsfp02_tx1p : out std_logic;
qsfp02_rx1n : in std_logic;
qsfp02_rx1p : in std_logic;
qsfp02_tx2n : out std_logic;
qsfp02_tx2p : out std_logic;
qsfp02_rx2n : in std_logic;
qsfp02_rx2p : in std_logic;
qsfp02_tx3n : out std_logic;
qsfp02_tx3p : out std_logic;
qsfp02_rx3n : in std_logic;
qsfp02_rx3p : in std_logic;
qsfp02_tx4n : out std_logic;
qsfp02_tx4p : out std_logic;
qsfp02_rx4n : in std_logic;
qsfp02_rx4p : in std_logic;
qsfp02_modprsl : in std_logic;
qsfp02_resetn : out std_logic;
qsfp02_intl : in std_logic;
-- GT01 interface
gt01_datarx : out std_logic_vector(15 downto 0);
gt01_datatx : in std_logic_vector(15 downto 0);
gt01_powergood : out std_logic;
gt01_qplllock : out std_logic;
gt01_txclkactive : out std_logic;
gt01_rxclkactive : out std_logic;
gt01_txresetdone : out std_logic;
gt01_rxresetdone : out std_logic;
gt01_rxcdrlock : out std_logic;
gt01_rxbyteisaligned : out std_logic;
gt01_rxbyterealign : out std_logic;
gt01_rxcommadet : out std_logic;
gt01_txfault : out std_logic;
gt01_rxlos : out std_logic;
gt01_modabs : out std_logic;
gt01_rstall : in std_logic;
gt01_rxcommadeten : in std_logic;
gt01_txdisable : in std_logic;
-- GT02 interface
gt02_datarx : out std_logic_vector(15 downto 0);
gt02_datatx : in std_logic_vector(15 downto 0);
gt02_powergood : out std_logic;
gt02_qplllock : out std_logic;
gt02_txclkactive : out std_logic;
gt02_rxclkactive : out std_logic;
gt02_txresetdone : out std_logic;
gt02_rxresetdone : out std_logic;
gt02_rxcdrlock : out std_logic;
gt02_rxbyteisaligned : out std_logic;
gt02_rxbyterealign : out std_logic;
gt02_rxcommadet : out std_logic;
gt02_txfault : out std_logic;
gt02_rxlos : out std_logic;
gt02_modabs : out std_logic;
gt02_rstall : in std_logic;
gt02_rxcommadeten : in std_logic;
gt02_txdisable : in std_logic;
-- GT03 interface
gt03_datarx : out std_logic_vector(15 downto 0);
gt03_datatx : in std_logic_vector(15 downto 0);
gt03_powergood : out std_logic;
gt03_qplllock : out std_logic;
gt03_txclkactive : out std_logic;
gt03_rxclkactive : out std_logic;
gt03_txresetdone : out std_logic;
gt03_rxresetdone : out std_logic;
gt03_rxcdrlock : out std_logic;
gt03_rxbyteisaligned : out std_logic;
gt03_rxbyterealign : out std_logic;
gt03_rxcommadet : out std_logic;
gt03_txfault : out std_logic;
gt03_rxlos : out std_logic;
gt03_modabs : out std_logic;
gt03_rstall : in std_logic;
gt03_rxcommadeten : in std_logic;
gt03_txdisable : in std_logic;
-- GT04 interface
gt04_datarx : out std_logic_vector(15 downto 0);
gt04_datatx : in std_logic_vector(15 downto 0);
gt04_powergood : out std_logic;
gt04_qplllock : out std_logic;
gt04_txclkactive : out std_logic;
gt04_rxclkactive : out std_logic;
gt04_txresetdone : out std_logic;
gt04_rxresetdone : out std_logic;
gt04_rxcdrlock : out std_logic;
gt04_rxbyteisaligned : out std_logic;
gt04_rxbyterealign : out std_logic;
gt04_rxcommadet : out std_logic;
gt04_txfault : out std_logic;
gt04_rxlos : out std_logic;
gt04_modabs : out std_logic;
gt04_rstall : in std_logic;
gt04_rxcommadeten : in std_logic;
gt04_txdisable : in std_logic;
-- GT05 interface
gt05_datarx : out std_logic_vector(15 downto 0);
gt05_datatx : in std_logic_vector(15 downto 0);
gt05_powergood : out std_logic;
gt05_qplllock : out std_logic;
gt05_txclkactive : out std_logic;
gt05_rxclkactive : out std_logic;
gt05_txresetdone : out std_logic;
gt05_rxresetdone : out std_logic;
gt05_rxcdrlock : out std_logic;
gt05_rxbyteisaligned : out std_logic;
gt05_rxbyterealign : out std_logic;
gt05_rxcommadet : out std_logic;
gt05_txfault : out std_logic;
gt05_rxlos : out std_logic;
gt05_modabs : out std_logic;
gt05_rstall : in std_logic;
gt05_rxcommadeten : in std_logic;
gt05_txdisable : in std_logic;
-- GT06 interface
gt06_datarx : out std_logic_vector(15 downto 0);
gt06_datatx : in std_logic_vector(15 downto 0);
gt06_powergood : out std_logic;
gt06_qplllock : out std_logic;
gt06_txclkactive : out std_logic;
gt06_rxclkactive : out std_logic;
gt06_txresetdone : out std_logic;
gt06_rxresetdone : out std_logic;
gt06_rxcdrlock : out std_logic;
gt06_rxbyteisaligned : out std_logic;
gt06_rxbyterealign : out std_logic;
gt06_rxcommadet : out std_logic;
gt06_txfault : out std_logic;
gt06_rxlos : out std_logic;
gt06_modabs : out std_logic;
gt06_rstall : in std_logic;
gt06_rxcommadeten : in std_logic;
gt06_txdisable : in std_logic;
-- GT07 interface
gt07_datarx : out std_logic_vector(15 downto 0);
gt07_datatx : in std_logic_vector(15 downto 0);
gt07_powergood : out std_logic;
gt07_qplllock : out std_logic;
gt07_txclkactive : out std_logic;
gt07_rxclkactive : out std_logic;
gt07_txresetdone : out std_logic;
gt07_rxresetdone : out std_logic;
gt07_rxcdrlock : out std_logic;
gt07_rxbyteisaligned : out std_logic;
gt07_rxbyterealign : out std_logic;
gt07_rxcommadet : out std_logic;
gt07_txfault : out std_logic;
gt07_rxlos : out std_logic;
gt07_modabs : out std_logic;
gt07_rstall : in std_logic;
gt07_rxcommadeten : in std_logic;
gt07_txdisable : in std_logic;
-- GT08 interface
gt08_datarx : out std_logic_vector(15 downto 0);
gt08_datatx : in std_logic_vector(15 downto 0);
gt08_powergood : out std_logic;
gt08_qplllock : out std_logic;
gt08_txclkactive : out std_logic;
gt08_rxclkactive : out std_logic;
gt08_txresetdone : out std_logic;
gt08_rxresetdone : out std_logic;
gt08_rxcdrlock : out std_logic;
gt08_rxbyteisaligned : out std_logic;
gt08_rxbyterealign : out std_logic;
gt08_rxcommadet : out std_logic;
gt08_txfault : out std_logic;
gt08_rxlos : out std_logic;
gt08_modabs : out std_logic;
gt08_rstall : in std_logic;
gt08_rxcommadeten : in std_logic;
gt08_txdisable : in std_logic
);
end combpm_gtsfp_htgfmc2qsfp;
architecture rtl of combpm_gtsfp_htgfmc2qsfp is
--------------------------------
-- INTERFACE PORT ASSOCIATION --
--------------------------------
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_PARAMETER : STRING;
ATTRIBUTE X_INTERFACE_INFO of clk_100 : SIGNAL is "xilinx.com:signal:clock:1.0 clk_100 CLK";
ATTRIBUTE X_INTERFACE_PARAMETER of clk_100 : SIGNAL is "FREQ 100000000";
ATTRIBUTE X_INTERFACE_INFO of rst_n : SIGNAL is "xilinx.com:signal:reset:1.0 rst_n RST";
ATTRIBUTE X_INTERFACE_PARAMETER of rst_n : SIGNAL is "POLARITY ACTIVE_LOW";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_tx1n : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_tx1n";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_tx1p : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_tx1p";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_rx1n : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_rx1n";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_rx1p : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_rx1p";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_tx2n : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_tx2n";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_tx2p : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_tx2p";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_rx2n : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_rx2n";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_rx2p : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_rx2p";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_tx3n : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_tx3n";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_tx3p : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_tx3p";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_rx3n : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_rx3n";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_rx3p : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_rx3p";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_tx4n : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_tx4n";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_tx4p : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_tx4p";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_rx4n : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_rx4n";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_rx4p : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_rx4p";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_modprsl : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_modprsl";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_resetn : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_resetn";
ATTRIBUTE X_INTERFACE_INFO of qsfp02_intl : SIGNAL is "soleil:user:qsfp:1.0 QSFP02 qsfp02_intl";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_tx1n : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_tx1n";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_tx1p : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_tx1p";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_rx1n : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_rx1n";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_rx1p : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_rx1p";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_tx2n : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_tx2n";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_tx2p : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_tx2p";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_rx2n : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_rx2n";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_rx2p : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_rx2p";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_tx3n : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_tx3n";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_tx3p : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_tx3p";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_rx3n : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_rx3n";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_rx3p : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_rx3p";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_tx4n : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_tx4n";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_tx4p : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_tx4p";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_rx4n : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_rx4n";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_rx4p : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_rx4p";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_modprsl : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_modprsl";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_resetn : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_resetn";
ATTRIBUTE X_INTERFACE_INFO of qsfp01_intl : SIGNAL is "soleil:user:qsfp:1.0 QSFP01 qsfp01_intl";
ATTRIBUTE X_INTERFACE_INFO of gt01_datarx : SIGNAL is "soleil:user:gtsfp:1.0 GT01 datarx";
ATTRIBUTE X_INTERFACE_INFO of gt01_datatx : SIGNAL is "soleil:user:gtsfp:1.0 GT01 datatx";
ATTRIBUTE X_INTERFACE_INFO of gt01_powergood : SIGNAL is "soleil:user:gtsfp:1.0 GT01 powergood";
ATTRIBUTE X_INTERFACE_INFO of gt01_qplllock : SIGNAL is "soleil:user:gtsfp:1.0 GT01 qplllock";
ATTRIBUTE X_INTERFACE_INFO of gt01_txclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT01 txclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt01_rxclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rxclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt01_txresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT01 txresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt01_rxresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rxresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt01_rxcdrlock : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rxcdrlock";
ATTRIBUTE X_INTERFACE_INFO of gt01_rxbyteisaligned : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rxbyteisaligned";
ATTRIBUTE X_INTERFACE_INFO of gt01_rxbyterealign : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rxbyterealign";
ATTRIBUTE X_INTERFACE_INFO of gt01_rxcommadet : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rxcommadet";
ATTRIBUTE X_INTERFACE_INFO of gt01_txfault : SIGNAL is "soleil:user:gtsfp:1.0 GT01 txfault";
ATTRIBUTE X_INTERFACE_INFO of gt01_rxlos : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rxlos";
ATTRIBUTE X_INTERFACE_INFO of gt01_modabs : SIGNAL is "soleil:user:gtsfp:1.0 GT01 modabs";
ATTRIBUTE X_INTERFACE_INFO of gt01_rstall : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rstall";
ATTRIBUTE X_INTERFACE_INFO of gt01_rxcommadeten : SIGNAL is "soleil:user:gtsfp:1.0 GT01 rxcommadeten";
ATTRIBUTE X_INTERFACE_INFO of gt01_txdisable : SIGNAL is "soleil:user:gtsfp:1.0 GT01 txdisable";
ATTRIBUTE X_INTERFACE_INFO of gt02_datarx : SIGNAL is "soleil:user:gtsfp:1.0 GT02 datarx";
ATTRIBUTE X_INTERFACE_INFO of gt02_datatx : SIGNAL is "soleil:user:gtsfp:1.0 GT02 datatx";
ATTRIBUTE X_INTERFACE_INFO of gt02_powergood : SIGNAL is "soleil:user:gtsfp:1.0 GT02 powergood";
ATTRIBUTE X_INTERFACE_INFO of gt02_qplllock : SIGNAL is "soleil:user:gtsfp:1.0 GT02 qplllock";
ATTRIBUTE X_INTERFACE_INFO of gt02_txclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT02 txclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt02_rxclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rxclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt02_txresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT02 txresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt02_rxresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rxresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt02_rxcdrlock : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rxcdrlock";
ATTRIBUTE X_INTERFACE_INFO of gt02_rxbyteisaligned : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rxbyteisaligned";
ATTRIBUTE X_INTERFACE_INFO of gt02_rxbyterealign : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rxbyterealign";
ATTRIBUTE X_INTERFACE_INFO of gt02_rxcommadet : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rxcommadet";
ATTRIBUTE X_INTERFACE_INFO of gt02_txfault : SIGNAL is "soleil:user:gtsfp:1.0 GT02 txfault";
ATTRIBUTE X_INTERFACE_INFO of gt02_rxlos : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rxlos";
ATTRIBUTE X_INTERFACE_INFO of gt02_modabs : SIGNAL is "soleil:user:gtsfp:1.0 GT02 modabs";
ATTRIBUTE X_INTERFACE_INFO of gt02_rstall : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rstall";
ATTRIBUTE X_INTERFACE_INFO of gt02_rxcommadeten : SIGNAL is "soleil:user:gtsfp:1.0 GT02 rxcommadeten";
ATTRIBUTE X_INTERFACE_INFO of gt02_txdisable : SIGNAL is "soleil:user:gtsfp:1.0 GT02 txdisable";
ATTRIBUTE X_INTERFACE_INFO of gt03_datarx : SIGNAL is "soleil:user:gtsfp:1.0 GT03 datarx";
ATTRIBUTE X_INTERFACE_INFO of gt03_datatx : SIGNAL is "soleil:user:gtsfp:1.0 GT03 datatx";
ATTRIBUTE X_INTERFACE_INFO of gt03_powergood : SIGNAL is "soleil:user:gtsfp:1.0 GT03 powergood";
ATTRIBUTE X_INTERFACE_INFO of gt03_qplllock : SIGNAL is "soleil:user:gtsfp:1.0 GT03 qplllock";
ATTRIBUTE X_INTERFACE_INFO of gt03_txclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT03 txclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt03_rxclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rxclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt03_txresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT03 txresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt03_rxresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rxresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt03_rxcdrlock : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rxcdrlock";
ATTRIBUTE X_INTERFACE_INFO of gt03_rxbyteisaligned : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rxbyteisaligned";
ATTRIBUTE X_INTERFACE_INFO of gt03_rxbyterealign : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rxbyterealign";
ATTRIBUTE X_INTERFACE_INFO of gt03_rxcommadet : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rxcommadet";
ATTRIBUTE X_INTERFACE_INFO of gt03_txfault : SIGNAL is "soleil:user:gtsfp:1.0 GT03 txfault";
ATTRIBUTE X_INTERFACE_INFO of gt03_rxlos : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rxlos";
ATTRIBUTE X_INTERFACE_INFO of gt03_modabs : SIGNAL is "soleil:user:gtsfp:1.0 GT03 modabs";
ATTRIBUTE X_INTERFACE_INFO of gt03_rstall : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rstall";
ATTRIBUTE X_INTERFACE_INFO of gt03_rxcommadeten : SIGNAL is "soleil:user:gtsfp:1.0 GT03 rxcommadeten";
ATTRIBUTE X_INTERFACE_INFO of gt03_txdisable : SIGNAL is "soleil:user:gtsfp:1.0 GT03 txdisable";
ATTRIBUTE X_INTERFACE_INFO of gt04_datarx : SIGNAL is "soleil:user:gtsfp:1.0 GT04 datarx";
ATTRIBUTE X_INTERFACE_INFO of gt04_datatx : SIGNAL is "soleil:user:gtsfp:1.0 GT04 datatx";
ATTRIBUTE X_INTERFACE_INFO of gt04_powergood : SIGNAL is "soleil:user:gtsfp:1.0 GT04 powergood";
ATTRIBUTE X_INTERFACE_INFO of gt04_qplllock : SIGNAL is "soleil:user:gtsfp:1.0 GT04 qplllock";
ATTRIBUTE X_INTERFACE_INFO of gt04_txclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT04 txclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt04_rxclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rxclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt04_txresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT04 txresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt04_rxresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rxresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt04_rxcdrlock : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rxcdrlock";
ATTRIBUTE X_INTERFACE_INFO of gt04_rxbyteisaligned : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rxbyteisaligned";
ATTRIBUTE X_INTERFACE_INFO of gt04_rxbyterealign : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rxbyterealign";
ATTRIBUTE X_INTERFACE_INFO of gt04_rxcommadet : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rxcommadet";
ATTRIBUTE X_INTERFACE_INFO of gt04_txfault : SIGNAL is "soleil:user:gtsfp:1.0 GT04 txfault";
ATTRIBUTE X_INTERFACE_INFO of gt04_rxlos : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rxlos";
ATTRIBUTE X_INTERFACE_INFO of gt04_modabs : SIGNAL is "soleil:user:gtsfp:1.0 GT04 modabs";
ATTRIBUTE X_INTERFACE_INFO of gt04_rstall : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rstall";
ATTRIBUTE X_INTERFACE_INFO of gt04_rxcommadeten : SIGNAL is "soleil:user:gtsfp:1.0 GT04 rxcommadeten";
ATTRIBUTE X_INTERFACE_INFO of gt04_txdisable : SIGNAL is "soleil:user:gtsfp:1.0 GT04 txdisable";
---------------------------
-- COMPONENT DECLARATION --
---------------------------
COMPONENT gtwizard_ultrascale_htgfmc2qsfp
PORT (
gtwiz_userclk_tx_reset_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_tx_srcclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_tx_usrclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_tx_usrclk2_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_tx_active_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_reset_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_srcclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_usrclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_usrclk2_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_active_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_clk_freerun_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_all_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_tx_pll_and_datapath_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_tx_datapath_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_rx_pll_and_datapath_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_rx_datapath_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_rx_cdr_stable_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_tx_done_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_rx_done_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userdata_tx_in : IN STD_LOGIC_VECTOR(127 DOWNTO 0);
gtwiz_userdata_rx_out : OUT STD_LOGIC_VECTOR(127 DOWNTO 0);
gtrefclk01_in : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
qpll1lock_out : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
qpll1outclk_out : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
qpll1outrefclk_out : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
gtyrxn_in : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
gtyrxp_in : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
rx8b10ben_in : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
rxbufreset_in : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
rxcommadeten_in : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
rxmcommaalignen_in : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
rxpcommaalignen_in : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
tx8b10ben_in : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
txctrl0_in : IN STD_LOGIC_VECTOR(127 DOWNTO 0);
txctrl1_in : IN STD_LOGIC_VECTOR(127 DOWNTO 0);
txctrl2_in : IN STD_LOGIC_VECTOR(63 DOWNTO 0);
gtpowergood_out : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
gtytxn_out : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
gtytxp_out : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
rxbufstatus_out : OUT STD_LOGIC_VECTOR(23 DOWNTO 0);
rxbyteisaligned_out : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
rxbyterealign_out : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
rxcdrlock_out : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
rxclkcorcnt_out : OUT STD_LOGIC_VECTOR(15 DOWNTO 0);
rxcommadet_out : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
rxctrl0_out : OUT STD_LOGIC_VECTOR(127 DOWNTO 0);
rxctrl1_out : OUT STD_LOGIC_VECTOR(127 DOWNTO 0);
rxctrl2_out : OUT STD_LOGIC_VECTOR(63 DOWNTO 0);
rxctrl3_out : OUT STD_LOGIC_VECTOR(63 DOWNTO 0);
rxpmaresetdone_out : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
txpmaresetdone_out : OUT STD_LOGIC_VECTOR(7 DOWNTO 0)
);
END COMPONENT;
------------------------
-- SIGNAL DECLARATION --
------------------------
signal txclkactive : std_logic;
signal rxclkactive : std_logic;
signal rstall : std_logic;
signal txresetdone : std_logic;
signal rxresetdone : std_logic;
signal qplllock : std_logic_vector(1 downto 0);
signal ref_clk : std_logic;
begin
---------------------
-- DIFF CLK BUFFER --
---------------------
ibufd_clkref_inst: IBUFDS_GTE4
generic map (
REFCLK_EN_TX_PATH => '0',
REFCLK_HROW_CK_SEL => "00",
REFCLK_ICNTL_RX => "00"
)
port map (
O => ref_clk,
ODIV2 => open,
CEB => '0',
I => mgtrefclk_p,
IB => mgtrefclk_n
);
--------------------
-- GLOBAL SIGNALS --
--------------------
gt01_txclkactive <= txclkactive;
gt02_txclkactive <= txclkactive;
gt03_txclkactive <= txclkactive;
gt04_txclkactive <= txclkactive;
gt05_txclkactive <= txclkactive;
gt06_txclkactive <= txclkactive;
gt07_txclkactive <= txclkactive;
gt08_txclkactive <= txclkactive;
gt01_rxclkactive <= rxclkactive;
gt02_rxclkactive <= rxclkactive;
gt03_rxclkactive <= rxclkactive;
gt04_rxclkactive <= rxclkactive;
gt05_rxclkactive <= rxclkactive;
gt06_rxclkactive <= rxclkactive;
gt07_rxclkactive <= rxclkactive;
gt08_rxclkactive <= rxclkactive;
rstall <= gt01_rstall
or gt02_rstall
or gt03_rstall
or gt04_rstall
or gt05_rstall
or gt06_rstall
or gt07_rstall
or gt08_rstall;
gt01_txresetdone <= txresetdone;
gt02_txresetdone <= txresetdone;
gt03_txresetdone <= txresetdone;
gt04_txresetdone <= txresetdone;
gt05_txresetdone <= txresetdone;
gt06_txresetdone <= txresetdone;
gt07_txresetdone <= txresetdone;
gt08_txresetdone <= txresetdone;
gt01_rxresetdone <= rxresetdone;
gt02_rxresetdone <= rxresetdone;
gt03_rxresetdone <= rxresetdone;
gt04_rxresetdone <= rxresetdone;
gt05_rxresetdone <= rxresetdone;
gt06_rxresetdone <= rxresetdone;
gt07_rxresetdone <= rxresetdone;
gt08_rxresetdone <= rxresetdone;
gt01_qplllock <= qplllock(0);
gt02_qplllock <= qplllock(0);
gt03_qplllock <= qplllock(0);
gt04_qplllock <= qplllock(0);
gt05_qplllock <= qplllock(1);
gt06_qplllock <= qplllock(1);
gt07_qplllock <= qplllock(1);
gt08_qplllock <= qplllock(1);
--------------------------
-- TRANSCEIVER INSTANCE --
--------------------------
gtwiz_inst: gtwizard_ultrascale_htgfmc2qsfp
PORT MAP (
gtwiz_userclk_tx_reset_in => "0",
gtwiz_userclk_tx_srcclk_out => open,
gtwiz_userclk_tx_usrclk_out => open,
gtwiz_userclk_tx_usrclk2_out => open,
gtwiz_userclk_tx_active_out(0) => txclkactive,
gtwiz_userclk_rx_reset_in => "0",
gtwiz_userclk_rx_srcclk_out => open,
gtwiz_userclk_rx_usrclk_out(0) => usrclk,
gtwiz_userclk_rx_usrclk2_out => open,
gtwiz_userclk_rx_active_out(0) => rxclkactive,
gtwiz_reset_clk_freerun_in(0) => clk_100,
gtwiz_reset_all_in(0) => rstall,
gtwiz_reset_tx_pll_and_datapath_in => "0",
gtwiz_reset_tx_datapath_in => "0",
gtwiz_reset_rx_pll_and_datapath_in => "0",
gtwiz_reset_rx_datapath_in => "0",
gtwiz_reset_rx_cdr_stable_out => open,
gtwiz_reset_tx_done_out(0) => txresetdone,
gtwiz_reset_rx_done_out(0) => rxresetdone,
gtwiz_userdata_tx_in(15 downto 0) => gt01_datatx,
gtwiz_userdata_tx_in(31 downto 16) => gt02_datatx,
gtwiz_userdata_tx_in(47 downto 32) => gt03_datatx,
gtwiz_userdata_tx_in(63 downto 48) => gt04_datatx,
gtwiz_userdata_tx_in(79 downto 64) => gt05_datatx,
gtwiz_userdata_tx_in(95 downto 80) => gt06_datatx,
gtwiz_userdata_tx_in(111 downto 96) => gt07_datatx,
gtwiz_userdata_tx_in(127 downto 112) => gt08_datatx,
gtwiz_userdata_rx_out(15 downto 0) => gt01_datarx,
gtwiz_userdata_rx_out(31 downto 16) => gt02_datarx,
gtwiz_userdata_rx_out(47 downto 32) => gt03_datarx,
gtwiz_userdata_rx_out(63 downto 48) => gt04_datarx,
gtwiz_userdata_rx_out(79 downto 64) => gt05_datarx,
gtwiz_userdata_rx_out(95 downto 80) => gt06_datarx,
gtwiz_userdata_rx_out(111 downto 96) => gt07_datarx,
gtwiz_userdata_rx_out(127 downto 112) => gt08_datarx,
gtrefclk01_in(0) => ref_clk,
gtrefclk01_in(1) => ref_clk,
qpll1lock_out => qplllock,
qpll1outclk_out => open,
qpll1outrefclk_out => open,
gtyrxn_in(0) => qsfp01_rx1n,
gtyrxn_in(1) => qsfp01_rx2n,
gtyrxn_in(2) => qsfp01_rx3n,
gtyrxn_in(3) => qsfp01_rx4n,
gtyrxn_in(4) => qsfp02_rx1n,
gtyrxn_in(5) => qsfp02_rx2n,
gtyrxn_in(6) => qsfp02_rx3n,
gtyrxn_in(7) => qsfp02_rx4n,
gtyrxp_in(0) => qsfp01_rx1p,
gtyrxp_in(1) => qsfp01_rx2p,
gtyrxp_in(2) => qsfp01_rx3p,
gtyrxp_in(3) => qsfp01_rx4p,
gtyrxp_in(4) => qsfp02_rx1p,
gtyrxp_in(5) => qsfp02_rx2p,
gtyrxp_in(6) => qsfp02_rx3p,
gtyrxp_in(7) => qsfp02_rx4p,
rxbufreset_in => (others => '0'),
rx8b10ben_in => (others => '1'),
rxcommadeten_in(0) => gt01_rxcommadeten,
rxcommadeten_in(1) => gt02_rxcommadeten,
rxcommadeten_in(2) => gt03_rxcommadeten,
rxcommadeten_in(3) => gt04_rxcommadeten,
rxcommadeten_in(4) => gt05_rxcommadeten,
rxcommadeten_in(5) => gt06_rxcommadeten,
rxcommadeten_in(6) => gt07_rxcommadeten,
rxcommadeten_in(7) => gt08_rxcommadeten,
rxmcommaalignen_in => (others => '1'),
rxpcommaalignen_in => (others => '1'),
tx8b10ben_in => (others => '1'),
txctrl0_in => (others => '0'),
txctrl1_in => (others => '0'),
txctrl2_in => (others => '0'),
gtpowergood_out(0) => gt01_powergood,
gtpowergood_out(1) => gt02_powergood,
gtpowergood_out(2) => gt03_powergood,
gtpowergood_out(3) => gt04_powergood,
gtpowergood_out(4) => gt05_powergood,
gtpowergood_out(5) => gt06_powergood,
gtpowergood_out(6) => gt07_powergood,
gtpowergood_out(7) => gt08_powergood,
gtytxn_out(0) => qsfp01_tx1n,
gtytxn_out(1) => qsfp01_tx2n,
gtytxn_out(2) => qsfp01_tx3n,
gtytxn_out(3) => qsfp01_tx4n,
gtytxn_out(4) => qsfp02_tx1n,
gtytxn_out(5) => qsfp02_tx2n,
gtytxn_out(6) => qsfp02_tx3n,
gtytxn_out(7) => qsfp02_tx4n,
gtytxp_out(0) => qsfp01_tx1p,
gtytxp_out(1) => qsfp01_tx2p,
gtytxp_out(2) => qsfp01_tx3p,
gtytxp_out(3) => qsfp01_tx4p,
gtytxp_out(4) => qsfp02_tx1p,
gtytxp_out(5) => qsfp02_tx2p,
gtytxp_out(6) => qsfp02_tx3p,
gtytxp_out(7) => qsfp02_tx4p,
rxbufstatus_out => open,
rxbyteisaligned_out(0) => gt01_rxbyteisaligned,
rxbyteisaligned_out(1) => gt02_rxbyteisaligned,
rxbyteisaligned_out(2) => gt03_rxbyteisaligned,
rxbyteisaligned_out(3) => gt04_rxbyteisaligned,
rxbyteisaligned_out(4) => gt05_rxbyteisaligned,
rxbyteisaligned_out(5) => gt06_rxbyteisaligned,
rxbyteisaligned_out(6) => gt07_rxbyteisaligned,
rxbyteisaligned_out(7) => gt08_rxbyteisaligned,
rxbyterealign_out(0) => gt01_rxbyterealign,
rxbyterealign_out(1) => gt02_rxbyterealign,
rxbyterealign_out(2) => gt03_rxbyterealign,
rxbyterealign_out(3) => gt04_rxbyterealign,
rxbyterealign_out(4) => gt05_rxbyterealign,
rxbyterealign_out(5) => gt06_rxbyterealign,
rxbyterealign_out(6) => gt07_rxbyterealign,
rxbyterealign_out(7) => gt08_rxbyterealign,
rxcdrlock_out(0) => gt01_rxcdrlock,
rxcdrlock_out(1) => gt02_rxcdrlock,
rxcdrlock_out(2) => gt03_rxcdrlock,
rxcdrlock_out(3) => gt04_rxcdrlock,
rxcdrlock_out(4) => gt05_rxcdrlock,
rxcdrlock_out(5) => gt06_rxcdrlock,
rxcdrlock_out(6) => gt07_rxcdrlock,
rxcdrlock_out(7) => gt08_rxcdrlock,
rxclkcorcnt_out => open,
rxcommadet_out(0) => gt01_rxcommadet,
rxcommadet_out(1) => gt02_rxcommadet,
rxcommadet_out(2) => gt03_rxcommadet,
rxcommadet_out(3) => gt04_rxcommadet,
rxcommadet_out(4) => gt05_rxcommadet,
rxcommadet_out(5) => gt06_rxcommadet,
rxcommadet_out(6) => gt07_rxcommadet,
rxcommadet_out(7) => gt08_rxcommadet,
rxctrl0_out => open,
rxctrl1_out => open,
rxctrl2_out => open,
rxctrl3_out => open,
rxpmaresetdone_out => open,
txpmaresetdone_out => open
);
----------------------
-- DIRECT CONNEXION --
----------------------
gt01_txfault <= qsfp01_modprsl;
gt02_txfault <= qsfp01_modprsl;
gt03_txfault <= qsfp01_modprsl;
gt04_txfault <= qsfp01_modprsl;
gt05_txfault <= qsfp02_modprsl;
gt06_txfault <= qsfp02_modprsl;
gt07_txfault <= qsfp02_modprsl;
gt08_txfault <= qsfp02_modprsl;
gt01_rxlos <= qsfp01_modprsl;
gt02_rxlos <= qsfp01_modprsl;
gt03_rxlos <= qsfp01_modprsl;
gt04_rxlos <= qsfp01_modprsl;
gt05_rxlos <= qsfp02_modprsl;
gt06_rxlos <= qsfp02_modprsl;
gt07_rxlos <= qsfp02_modprsl;
gt08_rxlos <= qsfp02_modprsl;
gt01_modabs <= qsfp01_modprsl;
gt02_modabs <= qsfp01_modprsl;
gt03_modabs <= qsfp01_modprsl;
gt04_modabs <= qsfp01_modprsl;
gt05_modabs <= qsfp02_modprsl;
gt06_modabs <= qsfp02_modprsl;
gt07_modabs <= qsfp02_modprsl;
gt08_modabs <= qsfp02_modprsl;
qsfp01_resetn <= '1';
qsfp02_resetn <= '1';
end architecture rtl;
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.pkg_bpmpacket_stream.all;
entity combpm_packet_filter is
generic(
G_B_ADDR_W : natural := 14
);
port(
axis_clk : in std_logic;
axi_clk : in std_logic;
axis_rst_n : in std_logic;
axi_rst_n : in std_logic;
-- AXIS SLAVE INTERFACE
s_axis_tdest : in std_logic_vector(C_TDEST_W-1 downto 0);
s_axis_tdata : in std_logic_vector(C_TDATA_W-1 downto 0);
s_axis_tlast : in std_logic;
s_axis_tvalid : in std_logic;
s_axis_tready : out std_logic;
-- AXIS SLAVE INTERFACE
m_axis_tdest : out std_logic_vector(C_TDEST_W-1 downto 0);
m_axis_tdata : out std_logic_vector(C_TDATA_W-1 downto 0);
m_axis_tlast : out std_logic;
m_axis_tvalid : out std_logic;
-- AXI bus interface
s_axi_awaddr : IN STD_LOGIC_VECTOR(G_B_ADDR_W-1 DOWNTO 0);
s_axi_awlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_awsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_awburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_awlock : IN STD_LOGIC;
s_axi_awcache : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_awprot : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_awvalid : IN STD_LOGIC;
s_axi_awready : OUT STD_LOGIC;
s_axi_wdata : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_wstrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_wlast : IN STD_LOGIC;
s_axi_wvalid : IN STD_LOGIC;
s_axi_wready : OUT STD_LOGIC;
s_axi_bresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_bvalid : OUT STD_LOGIC;
s_axi_bready : IN STD_LOGIC;
s_axi_araddr : IN STD_LOGIC_VECTOR(G_B_ADDR_W-1 DOWNTO 0);
s_axi_arlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_arsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_arburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_arlock : IN STD_LOGIC;
s_axi_arcache : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_arprot : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_arvalid : IN STD_LOGIC;
s_axi_arready : OUT STD_LOGIC;
s_axi_rdata : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_rresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_rlast : OUT STD_LOGIC;
s_axi_rvalid : OUT STD_LOGIC;
s_axi_rready : IN STD_LOGIC
);
end combpm_packet_filter;
architecture rtl of combpm_packet_filter is
---------------------------
-- COMPONENT DECLARATION --
---------------------------
COMPONENT combpm_packet_filter_axi_bram_ctrl
PORT (
s_axi_aclk : IN STD_LOGIC;
s_axi_aresetn : IN STD_LOGIC;
s_axi_awaddr : IN STD_LOGIC_VECTOR(G_B_ADDR_W-1 DOWNTO 0);
s_axi_awlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_awsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_awburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_awlock : IN STD_LOGIC;
s_axi_awcache : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_awprot : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_awvalid : IN STD_LOGIC;
s_axi_awready : OUT STD_LOGIC;
s_axi_wdata : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_wstrb : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_wlast : IN STD_LOGIC;
s_axi_wvalid : IN STD_LOGIC;
s_axi_wready : OUT STD_LOGIC;
s_axi_bresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_bvalid : OUT STD_LOGIC;
s_axi_bready : IN STD_LOGIC;
s_axi_araddr : IN STD_LOGIC_VECTOR(G_B_ADDR_W-1 DOWNTO 0);
s_axi_arlen : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
s_axi_arsize : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_arburst : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_arlock : IN STD_LOGIC;
s_axi_arcache : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
s_axi_arprot : IN STD_LOGIC_VECTOR(2 DOWNTO 0);
s_axi_arvalid : IN STD_LOGIC;
s_axi_arready : OUT STD_LOGIC;
s_axi_rdata : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
s_axi_rresp : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
s_axi_rlast : OUT STD_LOGIC;
s_axi_rvalid : OUT STD_LOGIC;
s_axi_rready : IN STD_LOGIC;
bram_rst_a : OUT STD_LOGIC;
bram_clk_a : OUT STD_LOGIC;
bram_en_a : OUT STD_LOGIC;
bram_we_a : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
bram_addr_a : OUT STD_LOGIC_VECTOR(G_B_ADDR_W-1 DOWNTO 0);
bram_wrdata_a : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
bram_rddata_a : IN STD_LOGIC_VECTOR(31 DOWNTO 0)
);
END COMPONENT;
COMPONENT combpm_packet_filter_blk_mem
PORT (
clka : IN STD_LOGIC;
ena : IN STD_LOGIC;
wea : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
addra : IN STD_LOGIC_VECTOR(G_B_ADDR_W-3 DOWNTO 0);
dina : IN STD_LOGIC_VECTOR(31 DOWNTO 0);
douta : OUT STD_LOGIC_VECTOR(31 DOWNTO 0);
clkb : IN STD_LOGIC;
enb : IN STD_LOGIC;
web : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
addrb : IN STD_LOGIC_VECTOR(G_B_ADDR_W-1 DOWNTO 0);
dinb : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
doutb : OUT STD_LOGIC_VECTOR(7 DOWNTO 0)
);
END COMPONENT;
------------------------
-- SIGNAL DECLARATION --
------------------------
signal in_packet : t_bpmpacket;
signal out_packet : t_bpmpacket;
signal bram_clk_a : STD_LOGIC;
signal bram_en_a : STD_LOGIC;
signal bram_we_a : STD_LOGIC_VECTOR(3 DOWNTO 0);
signal bram_addr_a : STD_LOGIC_VECTOR(G_B_ADDR_W-3 DOWNTO 0);
signal bram_wrdata_a : STD_LOGIC_VECTOR(31 DOWNTO 0);
signal bram_rddata_a : STD_LOGIC_VECTOR(31 DOWNTO 0);
signal table_data : std_logic_vector(7 downto 0);
signal tvalid_r : std_logic_vector(1 downto 0);
signal zero_packet : std_logic_vector(C_TDATA_W-1 downto 0);
begin
zero_packet <= (others => '0');
-- always ready
s_axis_tready <= '1';
----------------------
-- STREAM REGISTERS --
----------------------
p_main: process(axis_clk, axis_rst_n)
begin
if axis_rst_n = '0' then
in_packet <= slv2bpmpacket(zero_packet);
out_packet <= slv2bpmpacket(zero_packet);
elsif rising_edge(axis_clk) then
-- Register input packet
if s_axis_tvalid = '1' then
in_packet <= slv2bpmpacket(s_axis_tdata);
end if;
tvalid_r(tvalid_r'left downto 1) <= tvalid_r(tvalid_r'left-1 downto 0);
tvalid_r(0) <= s_axis_tvalid;
out_packet <= in_packet;
end if;
end process;
-----------------
-- AXIS OUTPUT --
-----------------
m_axis_tdest <= std_logic_vector(resize(unsigned(table_data(6 downto 0)), C_TDEST_W));
m_axis_tdata <= bpmpacket2slv(out_packet);
m_axis_tlast <= '1'; -- Packet is one tdata only
m_axis_tvalid <= tvalid_r(tvalid_r'left) and table_data(7);
---------------------
-- BRAM CONTROLLER --
---------------------
inst_bram_ctrl : combpm_packet_filter_axi_bram_ctrl
port map (
s_axi_aclk => axi_clk,
s_axi_aresetn => axi_rst_n,
s_axi_awaddr => s_axi_awaddr,
s_axi_awlen => s_axi_awlen,
s_axi_awsize => s_axi_awsize,
s_axi_awburst => s_axi_awburst,
s_axi_awlock => s_axi_awlock,
s_axi_awcache => s_axi_awcache,
s_axi_awprot => s_axi_awprot,
s_axi_awvalid => s_axi_awvalid,
s_axi_awready => s_axi_awready,
s_axi_wdata => s_axi_wdata,
s_axi_wstrb => s_axi_wstrb,
s_axi_wlast => s_axi_wlast,
s_axi_wvalid => s_axi_wvalid,
s_axi_wready => s_axi_wready,
s_axi_bresp => s_axi_bresp,
s_axi_bvalid => s_axi_bvalid,
s_axi_bready => s_axi_bready,
s_axi_araddr => s_axi_araddr,
s_axi_arlen => s_axi_arlen,
s_axi_arsize => s_axi_arsize,
s_axi_arburst => s_axi_arburst,
s_axi_arlock => s_axi_arlock,
s_axi_arcache => s_axi_arcache,
s_axi_arprot => s_axi_arprot,
s_axi_arvalid => s_axi_arvalid,
s_axi_arready => s_axi_arready,
s_axi_rdata => s_axi_rdata,
s_axi_rresp => s_axi_rresp,
s_axi_rlast => s_axi_rlast,
s_axi_rvalid => s_axi_rvalid,
s_axi_rready => s_axi_rready,
bram_rst_a => open,
bram_clk_a => bram_clk_a,
bram_en_a => bram_en_a,
bram_we_a => bram_we_a,
bram_addr_a(1 downto 0) => open,
bram_addr_a(G_B_ADDR_W-1 downto 2) => bram_addr_a,
bram_wrdata_a => bram_wrdata_a,
bram_rddata_a => bram_rddata_a
);
-------------------
-- BRAM INSTANCE --
-------------------
inst_bram : combpm_packet_filter_blk_mem
port map(
clka => bram_clk_a,
ena => bram_en_a,
wea => bram_we_a,
addra => bram_addr_a,
dina => bram_wrdata_a,
douta => bram_rddata_a,
clkb => axis_clk,
enb => '1',
web => "0",
addrb => in_packet.bpm_id(G_B_ADDR_W-1 downto 0),
dinb => (others => '0'),
doutb => table_data
);
end architecture rtl;
......@@ -3,92 +3,38 @@ library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library xpm;
use xpm.vcomponents.all;
use work.pkg_bpmpacket_stream.all;
entity combpm_protocol_electron is
port(
rst_n : in std_logic;
clk : in std_logic;
rst_n : in std_logic; -- Asynchronous active low reset.
clk : in std_logic; -- Clock synchronous to data input.
pps : in std_logic; -- One pulse per second. Used for frame rate estimation.
mc_time : in std_logic_vector(39 downto 0); -- Machine clock time for frame time stamping.
-- GT interface
gt_datarx : in std_logic_vector(15 downto 0);
gt_datatx : out std_logic_vector(15 downto 0);
gt_powergood : in std_logic;
gt_qplllock : in std_logic;
gt_txclkactive : in std_logic;
gt_rxclkactive : in std_logic;
gt_txresetdone : in std_logic;
gt_rxresetdone : in std_logic;
gt_rxcdrlock : in std_logic;
gt_rxbyteisaligned : in std_logic;
gt_rxbyterealign : in std_logic;
gt_rxcommadet : in std_logic;
gt_txfault : in std_logic;
gt_rxlos : in std_logic;
gt_modabs : in std_logic;
gt_rstall : out std_logic;
gt_rxcommadeten : out std_logic;
gt_txdisable : out std_logic;
gt_datarx : in std_logic_vector(15 downto 0); -- Deserialized data.
-- AXIS interface
m_axi_tid : out std_logic_vector(0 downto 0);
m_axi_tdest : out std_logic_vector(9 downto 0);
m_axi_tdata : out std_logic_vector(127 downto 0);
m_axi_tstrb : out std_logic_vector(15 downto 0);
m_axi_tkeep : out std_logic_vector(15 downto 0);
m_axi_tlast : out std_logic;
m_axi_tuser : out std_logic_vector(0 downto 0);
m_axi_tvalid : out std_logic;
m_axi_tready : in std_logic;
m_axis_m2s : out t_bpmpacket_axis_m2s;
m_axis_s2m : in t_bpmpacket_axis_s2m;
-- Status and control interface
tx_disable_i : in std_logic;
rx_commadeten_i : in std_logic;
srst_gt_i : in std_logic;
frame_counter_o : out std_logic_vector(15 downto 0);
frame_error_o : out std_logic
soft_reset : in std_logic; -- Reset all counters.
frame_seq_cnt : out std_logic_vector(15 downto 0); -- Number of frame in last sequence.
frame_valid_cnt : out std_logic_vector(31 downto 0); -- Count of valid frames.
frame_invalid_cnt : out std_logic_vector(31 downto 0); -- Count of invalid frames.
frame_valid_rate : out std_logic_vector(31 downto 0); -- Valid frame rate.
frame_invalid_rate : out std_logic_vector(31 downto 0); -- Invalid frame rate.
cnt_seq_mismatch : out std_logic; -- Pulse for number of frame in sequence mismatch.
seq_discontinuity : out std_logic; -- Pulse for discontinuity in sequence number.
frame_error : out std_logic -- Pulse for frame error.
);
end entity combpm_protocol_electron;
architecture rtl of combpm_protocol_electron is
--------------------------
-- INTERFACE ATTRIBUTES --
--------------------------
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_PARAMETER : STRING;
ATTRIBUTE X_INTERFACE_INFO of m_axi_tid : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TID";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tdest : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TDEST";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tdata : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TDATA";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tstrb : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TSTRB";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tkeep : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TKEEP";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tlast : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TLAST";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tuser : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TUSER";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tvalid : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TVALID";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tready : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TREADY";
ATTRIBUTE X_INTERFACE_INFO of gt_datarx : SIGNAL is "soleil:user:gtsfp:1.0 GT datarx";
ATTRIBUTE X_INTERFACE_INFO of gt_datatx : SIGNAL is "soleil:user:gtsfp:1.0 GT datatx";
ATTRIBUTE X_INTERFACE_INFO of gt_powergood : SIGNAL is "soleil:user:gtsfp:1.0 GT powergood";
ATTRIBUTE X_INTERFACE_INFO of gt_qplllock : SIGNAL is "soleil:user:gtsfp:1.0 GT qplllock";
ATTRIBUTE X_INTERFACE_INFO of gt_txclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT txclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt_rxclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT rxclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt_txresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT txresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt_rxresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT rxresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt_rxcdrlock : SIGNAL is "soleil:user:gtsfp:1.0 GT rxcdrlock";
ATTRIBUTE X_INTERFACE_INFO of gt_rxbyteisaligned : SIGNAL is "soleil:user:gtsfp:1.0 GT rxbyteisaligned";
ATTRIBUTE X_INTERFACE_INFO of gt_rxbyterealign : SIGNAL is "soleil:user:gtsfp:1.0 GT rxbyterealign";
ATTRIBUTE X_INTERFACE_INFO of gt_rxcommadet : SIGNAL is "soleil:user:gtsfp:1.0 GT rxcommadet";
ATTRIBUTE X_INTERFACE_INFO of gt_txfault : SIGNAL is "soleil:user:gtsfp:1.0 GT txfault";
ATTRIBUTE X_INTERFACE_INFO of gt_rxlos : SIGNAL is "soleil:user:gtsfp:1.0 GT rxlos";
ATTRIBUTE X_INTERFACE_INFO of gt_modabs : SIGNAL is "soleil:user:gtsfp:1.0 GT modabs";
ATTRIBUTE X_INTERFACE_INFO of rst_n : SIGNAL is "xilinx.com:signal:reset:1.0 rst_n RST";
ATTRIBUTE X_INTERFACE_PARAMETER of rst_n : SIGNAL is "POLARITY ACTIVE_LOW";
--------------------------
-- CONSTANT DECLARATION --
--------------------------
......@@ -101,7 +47,6 @@ architecture rtl of combpm_protocol_electron is
------------------------
-- SIGNAL DECLARATION --
------------------------
signal S_AXI_RESET : std_logic;
signal packet_reg : std_logic_vector(14*16-1 downto 0); -- Register to hold one packet
signal flag_sop_inc : std_logic;
......@@ -111,7 +56,7 @@ architecture rtl of combpm_protocol_electron is
signal flag_rsvd : std_logic;
signal flag_crc : std_logic;
signal flag_all : std_logic;
signal flag_any : std_logic;
signal flag_frame : std_logic;
signal packet_bpmid : std_logic_vector(9 downto 0);
signal packet_startframe : std_logic;
......@@ -128,10 +73,17 @@ architecture rtl of combpm_protocol_electron is
signal crc_cnt : unsigned(3 downto 0);
signal d : std_logic_vector(15 downto 0);
signal frame_counter : unsigned(15 downto 0);
signal gt_rxcommadeten_s : std_logic;
signal last_seq : std_logic_vector(15 downto 0);
signal itf_ready : std_logic;
signal last_cnt_seq_r : unsigned(15 downto 0);
signal cnt_frame_seq_r : unsigned(15 downto 0);
signal cnt_valid_r : unsigned(31 downto 0);
signal cnt_invalid_r : unsigned(31 downto 0);
signal rate_valid_r : unsigned(31 downto 0);
signal rate_invalid_r : unsigned(31 downto 0);
signal packet : t_bpmpacket;
signal m_axi_tvalid : std_logic;
begin
......@@ -176,8 +128,8 @@ begin
'0';
-- Any and all flag
flag_all <= flag_sop and flag_eop and flag_dummy and flag_rsvd and flag_crc and itf_ready;
flag_any <= flag_sop or flag_eop or flag_crc;
flag_all <= flag_sop and flag_eop and flag_dummy and flag_rsvd and flag_crc;
flag_frame <= flag_sop and flag_eop;
----------------------------
-- FRAME FIELD EXTRACTION --
......@@ -223,23 +175,25 @@ begin
crc_reg <= C_CRCINIT;
crc_cnt <= (others => '0');
elsif rising_edge(clk) then
if crc_cnt = 0 then
case crc_cnt is
when "0000" =>
if flag_sop_inc = '1' then
crc_cnt <= crc_cnt+1;
crc_reg <= C_CRCINIT;
else
crc_cnt <= (others => '0');
end if;
else
if crc_cnt = 10 then
crc_cnt <= (others => '0');
else
when "1011" =>
crc_reg <= crc_reg;
crc_cnt <= crc_cnt+1;
end if;
when "1100" =>
crc_reg <= crc_reg;
crc_cnt <= (others => '0');
when others =>
crc_reg <= lfsr_c;
crc_cnt <= crc_cnt+1;
end case;
end if;
end if;
end process p_crc;
......@@ -281,39 +235,34 @@ begin
--------------
-- AXIS OUT --
--------------
-- Static data
m_axi_tstrb <= (others => '1');
m_axi_tkeep <= (others => '1');
m_axi_tid <= "0";
m_axi_tuser <= "0";
m_axi_tlast <= '1'; -- One transfer is One packet.
m_axis_m2s.tdest <= (others => '0');
m_axis_m2s.tdata <= bpmpacket2slv(packet);
m_axis_m2s.tlast <= '1'; -- One transfer is One packet.
m_axis_m2s.tvalid <= m_axi_tvalid;
p_axis:process(clk, rst_n)
begin
if rst_n = '0' then
m_axi_tdata <= (others => '0');
packet <= C_BPMPACKET_ZERO;
m_axi_tvalid <= '0';
m_axi_tdest <= (others => '0');
elsif rising_edge(clk) then
if flag_all = '1' then
-- Make AXIS packet
m_axi_tdata(31 downto 0) <= packet_ypos;
m_axi_tdata(63 downto 32) <= packet_xpos;
m_axi_tdata(95 downto 64) <= x"0000" & packet_timestamp;
m_axi_tdata(111 downto 96) <= (others => '0');
m_axi_tdata(127 downto 112) <= "000000" & packet_bpmid;
-- AXIS ancillary data
m_axi_tdest <= packet_bpmid;
packet.pos_x <= packet_xpos;
packet.pos_y <= packet_ypos;
packet.bpm_id <= "000000" & packet_bpmid;
packet.mc_timestamp <= mc_time;
packet.fa_seq <= packet_timestamp(7 downto 0);
-- AXIS TVALID
m_axi_tvalid <= '1';
else
-- Acknowledge transfer
if m_axi_tready = '1' then
if m_axis_s2m.tready = '1' then
m_axi_tvalid <= '0';
end if;
end if;
......@@ -325,28 +274,97 @@ begin
------------------------
-- CONTROL AND STATUS --
------------------------
frame_error_o <= flag_any xor flag_all;
frame_counter_o <= std_logic_vector(frame_counter);
itf_ready <= gt_txresetdone and gt_rxresetdone and gt_powergood and gt_qplllock
and gt_rxbyteisaligned and (not srst_gt_i);
frame_error <= flag_frame and not flag_all;
frame_valid_cnt <= std_logic_vector(cnt_valid_r);
frame_invalid_cnt <= std_logic_vector(cnt_invalid_r);
frame_seq_cnt <= std_logic_vector(last_cnt_seq_r);
-- frame counter
p_framecnt:process(clk, rst_n)
begin
if rst_n = '0' then
frame_counter <= (others => '0');
cnt_frame_seq_r <= (others => '0');
cnt_valid_r <= (others => '0');
cnt_invalid_r <= (others => '0');
rate_valid_r <= (others => '0');
rate_invalid_r <= (others => '0');
frame_valid_rate<= (others => '0');
frame_invalid_rate<= (others => '0');
last_seq <= (others => '0');
last_cnt_seq_r <= (others => '0');
seq_discontinuity <= '0';
cnt_seq_mismatch <= '0';
elsif rising_edge(clk) then
if soft_reset = '1' then
cnt_frame_seq_r <= (others => '0');
cnt_valid_r <= (others => '0');
cnt_invalid_r <= (others => '0');
rate_valid_r <= (others => '0');
rate_invalid_r <= (others => '0');
frame_valid_rate<= (others => '0');
frame_invalid_rate<= (others => '0');
last_seq <= (others => '0');
last_cnt_seq_r <= (others => '0');
seq_discontinuity <= '0';
cnt_seq_mismatch <= '0';
else
-- Valid frame counter
if flag_all = '1' then
frame_counter <= frame_counter+1;
cnt_valid_r <= cnt_valid_r+1;
end if;
-- Invalid frame counter
if (flag_frame and not flag_all) = '1' then
cnt_invalid_r <= cnt_invalid_r+1;
end if;
-- Rate counter
if pps = '1' then
frame_valid_rate <= std_logic_vector(rate_valid_r);
frame_invalid_rate <= std_logic_vector(rate_invalid_r);
rate_valid_r <= (others => '0');
rate_invalid_r <= (others => '0');
else
-- Valid frame rate counter
if flag_all = '1' then
rate_valid_r <= rate_valid_r+1;
end if;
-- Invalid frame rate counter
if (flag_frame and not flag_all) = '1' then
rate_invalid_r <= rate_invalid_r+1;
end if;
end if;
-- Sequence detection
cnt_seq_mismatch <= '0'; -- Supercharged in logic below
seq_discontinuity <= '0'; -- Supercharged in logic below
if flag_all = '1' then
if last_seq = packet_timestamp then
-- Same sequence
cnt_frame_seq_r <= cnt_frame_seq_r+1;
else
-- New sequence
cnt_frame_seq_r <= (others => '0');
last_seq <= packet_timestamp;
last_cnt_seq_r <= cnt_frame_seq_r;
-- Check sequence increment
if unsigned(packet_timestamp) - unsigned(last_seq) /= 1 then
seq_discontinuity <= '1';
end if;
end process p_framecnt;
-- Check number of frame in sequence
if last_cnt_seq_r /= cnt_frame_seq_r then
cnt_seq_mismatch <= '1';
end if;
end if;
end if;
-- Direct connexion to GT/SFP
gt_txdisable <= tx_disable_i;
gt_rstall <= srst_gt_i;
gt_rxcommadeten <= rx_commadeten_i;
end if;
end if;
end process p_framecnt;
end architecture rtl;
-- This file was automatically generated with HECTARE
--
-- DO NOT EDIT
--
-- input_filename = combpm_protocol_electron_ctrl.rdl
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity combpm_protocol_electron_ctrl_axi is
generic(
G_ADDR_W: integer := 8
);
port (
sfp_txfault_i : in std_logic;
sfp_rxlos_i : in std_logic;
sfp_modabs_i : in std_logic;
sfp_txdisable_o : out std_logic;
gt_powergood_i : in std_logic;
gt_qplllock_i : in std_logic;
gt_txclkactive_i : in std_logic;
gt_rxclkactive_i : in std_logic;
gt_rxcdrlock_i : in std_logic;
gt_txresetdone_i : in std_logic;
gt_rxresetdone_i : in std_logic;
gt_rxbyteisaligned_i : in std_logic;
gt_rxbyterealign_i : in std_logic;
gt_rxcommadet_i : in std_logic;
gt_rxcommadeten_o : out std_logic;
gt_rstall_o : out std_logic;
protocol_framecnt_i : in std_logic_vector(15 downto 0);
protocol_frameerror_i : in std_logic;
clk : in std_logic;
reset : in std_logic;
S_AXI_AWADDR : in std_logic_vector(G_ADDR_W-1 downto 0);
S_AXI_AWPROT : in std_logic_vector(2 downto 0);
S_AXI_AWVALID : in std_logic;
S_AXI_AWREADY : out std_logic;
S_AXI_WDATA : in std_logic_vector(32-1 downto 0);
S_AXI_WSTRB : in std_logic_vector(32/8-1 downto 0);
S_AXI_WVALID : in std_logic;
S_AXI_WREADY : out std_logic;
S_AXI_BRESP : out std_logic_vector(1 downto 0);
S_AXI_BVALID : out std_logic;
S_AXI_BREADY : in std_logic;
S_AXI_ARADDR : in std_logic_vector(G_ADDR_W-1 downto 0);
S_AXI_ARPROT : in std_logic_vector(2 downto 0);
S_AXI_ARVALID : in std_logic;
S_AXI_ARREADY : out std_logic;
S_AXI_RDATA : out std_logic_vector(32-1 downto 0);
S_AXI_RRESP : out std_logic_vector(1 downto 0);
S_AXI_RVALID : out std_logic;
S_AXI_RREADY : in std_logic
);
end entity;
architecture arch of combpm_protocol_electron_ctrl_axi is
-- address constants
constant C_ADDR_SFP : integer := 0;
constant C_ADDR_GT : integer := 1;
constant C_ADDR_PROTOCOL : integer := 2;
-- field ranges constants
constant C_FIELD_SFP_TXFAULT_MSB : integer := 0;
constant C_FIELD_SFP_TXFAULT_LSB : integer := 0;
constant C_FIELD_SFP_RXLOS_MSB : integer := 1;
constant C_FIELD_SFP_RXLOS_LSB : integer := 1;
constant C_FIELD_SFP_MODABS_MSB : integer := 2;
constant C_FIELD_SFP_MODABS_LSB : integer := 2;
constant C_FIELD_SFP_TXDISABLE_MSB : integer := 3;
constant C_FIELD_SFP_TXDISABLE_LSB : integer := 3;
constant C_FIELD_GT_POWERGOOD_MSB : integer := 0;
constant C_FIELD_GT_POWERGOOD_LSB : integer := 0;
constant C_FIELD_GT_QPLLLOCK_MSB : integer := 1;
constant C_FIELD_GT_QPLLLOCK_LSB : integer := 1;
constant C_FIELD_GT_TXCLKACTIVE_MSB : integer := 2;
constant C_FIELD_GT_TXCLKACTIVE_LSB : integer := 2;
constant C_FIELD_GT_RXCLKACTIVE_MSB : integer := 3;
constant C_FIELD_GT_RXCLKACTIVE_LSB : integer := 3;
constant C_FIELD_GT_RXCDRLOCK_MSB : integer := 4;
constant C_FIELD_GT_RXCDRLOCK_LSB : integer := 4;
constant C_FIELD_GT_TXRESETDONE_MSB : integer := 5;
constant C_FIELD_GT_TXRESETDONE_LSB : integer := 5;
constant C_FIELD_GT_RXRESETDONE_MSB : integer := 6;
constant C_FIELD_GT_RXRESETDONE_LSB : integer := 6;
constant C_FIELD_GT_RXBYTEISALIGNED_MSB : integer := 7;
constant C_FIELD_GT_RXBYTEISALIGNED_LSB : integer := 7;
constant C_FIELD_GT_RXBYTEREALIGN_MSB : integer := 8;
constant C_FIELD_GT_RXBYTEREALIGN_LSB : integer := 8;
constant C_FIELD_GT_RXCOMMADET_MSB : integer := 9;
constant C_FIELD_GT_RXCOMMADET_LSB : integer := 9;
constant C_FIELD_GT_RXCOMMADETEN_MSB : integer := 10;
constant C_FIELD_GT_RXCOMMADETEN_LSB : integer := 10;
constant C_FIELD_GT_RSTALL_MSB : integer := 11;
constant C_FIELD_GT_RSTALL_LSB : integer := 11;
constant C_FIELD_PROTOCOL_FRAMECNT_MSB : integer := 15;
constant C_FIELD_PROTOCOL_FRAMECNT_LSB : integer := 0;
constant C_FIELD_PROTOCOL_FRAMEERROR_MSB : integer := 16;
constant C_FIELD_PROTOCOL_FRAMEERROR_LSB : integer := 16;
-- registers
signal reg_sfp : std_logic_vector(32-1 downto 0);
signal reg_gt : std_logic_vector(32-1 downto 0);
signal reg_protocol : std_logic_vector(32-1 downto 0);
-- read
type t_state_read is (sReadIdle, sReadValid);
signal state_read : t_state_read;
signal rdata_reg : std_logic_vector(31 downto 0);
signal raddr_word : integer;
signal arready_wire : std_logic;
signal rvalid_wire : std_logic;
-- write
type t_state_write is (sWriteIdle, sWriteWaitData, sWriteWaitAddr, sWriteResp);
signal state_write : t_state_write;
signal state_write_prev : t_state_write;
signal waddr_reg : std_logic_vector(G_ADDR_W-1 downto 0);
signal wdata_reg : std_logic_vector(31 downto 0);
signal waddr_word : integer;
signal awready_wire : std_logic;
signal wready_wire : std_logic;
signal bvalid_wire : std_logic;
begin
reg_sfp(0) <= sfp_txfault_i when rising_edge(clk);
reg_sfp(1) <= sfp_rxlos_i when rising_edge(clk);
reg_sfp(2) <= sfp_modabs_i when rising_edge(clk);
sfp_txdisable_o <= reg_sfp(3);
reg_gt(0) <= gt_powergood_i when rising_edge(clk);
reg_gt(1) <= gt_qplllock_i when rising_edge(clk);
reg_gt(2) <= gt_txclkactive_i when rising_edge(clk);
reg_gt(3) <= gt_rxclkactive_i when rising_edge(clk);
reg_gt(4) <= gt_rxcdrlock_i when rising_edge(clk);
reg_gt(5) <= gt_txresetdone_i when rising_edge(clk);
reg_gt(6) <= gt_rxresetdone_i when rising_edge(clk);
reg_gt(7) <= gt_rxbyteisaligned_i when rising_edge(clk);
reg_gt(8) <= gt_rxbyterealign_i when rising_edge(clk);
reg_gt(9) <= gt_rxcommadet_i when rising_edge(clk);
gt_rxcommadeten_o <= reg_gt(10);
gt_rstall_o <= reg_gt(11);
reg_protocol(15 downto 0) <= protocol_framecnt_i when rising_edge(clk);
reg_protocol(16) <= protocol_frameerror_i when rising_edge(clk);
proc_state_read: process (clk)
begin
if rising_edge(clk) then
if reset = '1' then
state_read <= sReadIdle;
else
case state_read is
when sReadIdle =>
if S_AXI_ARVALID = '1' then
state_read <= sReadValid;
end if;
when sReadValid =>
if S_AXI_RREADY = '1' then
state_read <= sReadIdle;
end if;
end case;
end if;
end if;
end process;
raddr_word <= to_integer(unsigned(S_AXI_ARADDR(G_ADDR_W-1 downto 2)));
-- ### read logic
proc_rdata_reg: process (clk)
begin
if rising_edge(clk) then
rdata_reg <= (others => '0');
case raddr_word is
when C_ADDR_SFP =>
rdata_reg(0 downto 0) <= reg_sfp(0 downto 0);
rdata_reg(1 downto 1) <= reg_sfp(1 downto 1);
rdata_reg(2 downto 2) <= reg_sfp(2 downto 2);
rdata_reg(3 downto 3) <= reg_sfp(3 downto 3);
when C_ADDR_GT =>
rdata_reg(0 downto 0) <= reg_gt(0 downto 0);
rdata_reg(1 downto 1) <= reg_gt(1 downto 1);
rdata_reg(2 downto 2) <= reg_gt(2 downto 2);
rdata_reg(3 downto 3) <= reg_gt(3 downto 3);
rdata_reg(4 downto 4) <= reg_gt(4 downto 4);
rdata_reg(5 downto 5) <= reg_gt(5 downto 5);
rdata_reg(6 downto 6) <= reg_gt(6 downto 6);
rdata_reg(7 downto 7) <= reg_gt(7 downto 7);
rdata_reg(8 downto 8) <= reg_gt(8 downto 8);
rdata_reg(9 downto 9) <= reg_gt(9 downto 9);
rdata_reg(10 downto 10) <= reg_gt(10 downto 10);
rdata_reg(11 downto 11) <= reg_gt(11 downto 11);
when C_ADDR_PROTOCOL =>
rdata_reg(15 downto 0) <= reg_protocol(15 downto 0);
rdata_reg(16 downto 16) <= reg_protocol(16 downto 16);
when others =>
-- decode error
rdata_reg <= x"badc0fee";
end case;
end if;
end process;
proc_read_output: process (state_read)
begin
case state_read is
when sReadIdle =>
arready_wire <= '1';
rvalid_wire <= '0';
when sReadValid =>
arready_wire <= '0';
rvalid_wire <= '1';
when others =>
arready_wire <= '0';
rvalid_wire <= '0';
end case;
end process;
S_AXI_ARREADY <= arready_wire;
S_AXI_RVALID <= rvalid_wire;
S_AXI_RDATA <= rdata_reg;
S_AXI_RRESP <= "00";
proc_state_write_prev: process (clk) begin
if rising_edge(clk) then
state_write_prev <= state_write;
end if;
end process;
proc_state_write: process (clk) begin
if rising_edge (clk) then
if reset = '1' then
state_write <= sWriteIdle;
else
case state_write is
when sWriteIdle =>
if S_AXI_AWVALID = '1' and S_AXI_WVALID = '1' then
state_write <= sWriteResp;
waddr_reg <= S_AXI_AWADDR;
wdata_reg <= S_AXI_WDATA;
elsif S_AXI_AWVALID = '1' and S_AXI_WVALID = '0' then
state_write <= sWriteWaitData;
waddr_reg <= S_AXI_AWADDR;
elsif S_AXI_AWVALID = '0' and S_AXI_WVALID = '1' then
state_write <= sWriteWaitAddr;
wdata_reg <= S_AXI_WDATA;
end if;
when sWriteWaitData =>
if S_AXI_WVALID = '1' then
state_write <= sWriteResp;
wdata_reg <= S_AXI_WDATA;
end if;
when sWriteWaitAddr =>
if S_AXI_AWVALID = '1' then
state_write <= sWriteResp;
waddr_reg <= S_AXI_AWADDR;
end if;
when sWriteResp =>
if S_AXI_BREADY = '1' then
state_write <= sWriteIdle;
end if;
end case;
end if;
end if;
end process;
waddr_word <= to_integer(unsigned(waddr_reg(G_ADDR_W-1 downto 2)));
-- ### write logic (use waddr_word and wdata_reg)
proc_write: process (clk) begin
if rising_edge(clk) then
if reset = '1' then
reg_sfp(3 downto 3) <= "0";
reg_gt(10 downto 10) <= "1";
reg_gt(11 downto 11) <= "1";
else
-- default (pulse)
-- default (swmod)
-- default (woclr)
if state_write = sWriteResp and state_write_prev /= sWriteResp then
case waddr_word is
when C_ADDR_SFP =>
reg_sfp(3 downto 3) <= wdata_reg(3 downto 3);
when C_ADDR_GT =>
reg_gt(10 downto 10) <= wdata_reg(10 downto 10);
reg_gt(11 downto 11) <= wdata_reg(11 downto 11);
when C_ADDR_PROTOCOL =>
null;
when others =>
null;
end case;
end if;
end if;
end if;
end process;
proc_write_output: process (state_write) begin
case state_write is
when sWriteIdle =>
awready_wire <= '1';
wready_wire <= '1';
bvalid_wire <= '0';
when sWriteWaitData =>
awready_wire <= '0';
wready_wire <= '1';
bvalid_wire <= '0';
when sWriteWaitAddr =>
awready_wire <= '1';
wready_wire <= '0';
bvalid_wire <= '0';
when sWriteResp =>
awready_wire <= '0';
wready_wire <= '0';
bvalid_wire <= '1';
when others =>
awready_wire <= '0';
wready_wire <= '0';
bvalid_wire <= '0';
end case;
end process;
S_AXI_AWREADY <= awready_wire;
S_AXI_WREADY <= wready_wire;
S_AXI_BRESP <= "00";
S_AXI_BVALID <= bvalid_wire;
end architecture;
-- Package BPMPACKET STREAM
-- this package describe the format of the AXI-Stream interface used by blocs of the module COMBPM.
--
-- The usefull things are :
-- * Two record types for port interfaces: t_bpmpacket_axis_m2s and t_bpmpacket_axis_s2m.
-- * One record type for frame fields: t_bpmpacket.
-- * Two functions to transform TDATA (std_logic_vector) to/from t_bpmpacket: slv2bpmpacket and bpmpacket2slv.
library ieee;
use ieee.std_logic_1164.all;
package pkg_bpmpacket_stream is
----------------------
-- MACRO PARAMETERS --
----------------------
constant C_TDEST_W : natural := 7;
constant C_TDATA_W : natural := 128;
---------------------------------
-- AXIS MASTER/SLAVE INTERFACE --
---------------------------------
type t_bpmpacket_axis_m2s is record
tdest : std_logic_vector(C_TDEST_W-1 downto 0);
tdata : std_logic_vector(C_TDATA_W-1 downto 0);
tlast : std_logic;
tvalid : std_logic;
end record t_bpmpacket_axis_m2s;
type t_bpmpacket_axis_s2m is record
tready : std_logic;
end record t_bpmpacket_axis_s2m;
------------------------
-- AXIS STREAM PACKET --
------------------------
type t_bpmpacket is record
pos_x : std_logic_vector(31 downto 0);
pos_y : std_logic_vector(31 downto 0);
bpm_id : std_logic_vector(15 downto 0);
mc_timestamp : std_logic_vector(39 downto 0);
fa_seq : std_logic_vector(7 downto 0);
end record t_bpmpacket;
constant C_BPMPACKET_ZERO : t_bpmpacket := (
pos_x => (others => '0'),
pos_y => (others => '0'),
bpm_id => (others => '0'),
mc_timestamp => (others => '0'),
fa_seq => (others => '0')
);
function slv2bpmpacket(
signal tdata : std_logic_vector(C_TDATA_W-1 downto 0)
)
return t_bpmpacket;
function bpmpacket2slv(
signal packet : t_bpmpacket
)
return std_logic_vector;
end package;
package body pkg_bpmpacket_stream is
function slv2bpmpacket(
signal tdata : std_logic_vector(C_TDATA_W-1 downto 0)
)
return t_bpmpacket is
variable packet : t_bpmpacket;
begin
packet.pos_x := tdata(31 downto 0);
packet.pos_y := tdata(63 downto 32);
packet.bpm_id := tdata(79 downto 64);
packet.mc_timestamp := tdata(119 downto 80);
packet.fa_seq := tdata(127 downto 120);
return packet;
end function;
function bpmpacket2slv(
signal packet : t_bpmpacket
)
return std_logic_vector is
begin
return packet.fa_seq & packet.mc_timestamp & packet.bpm_id & packet.pos_y & packet.pos_x;
end function;
end package body;
......@@ -6,207 +6,321 @@ library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library xpm;
use xpm.vcomponents.all;
library desyrdl;
use desyrdl.common.all;
use desyrdl.pkg_combpm.all;
use work.pkg_bpmpacket_stream.all;
use work.pkg_combpm_version.all;
entity top_combpm_electron is
port(
clk : in std_logic;
rst_n : in std_logic;
-- GT interface
gt_datarx : in std_logic_vector(15 downto 0);
gt_datatx : out std_logic_vector(15 downto 0);
gt_powergood : in std_logic;
gt_qplllock : in std_logic;
gt_txclkactive : in std_logic;
gt_rxclkactive : in std_logic;
gt_txresetdone : in std_logic;
gt_rxresetdone : in std_logic;
gt_rxcdrlock : in std_logic;
gt_rxbyteisaligned : in std_logic;
gt_rxbyterealign : in std_logic;
gt_rxcommadet : in std_logic;
gt_txfault : in std_logic;
gt_rxlos : in std_logic;
gt_modabs : in std_logic;
gt_rstall : out std_logic;
gt_rxcommadeten : out std_logic;
gt_txdisable : out std_logic;
rst_n : in std_logic; -- Asynchronous reset
free_100_clk : in std_logic; -- Freerunning clock for GT
pps : in std_logic; -- A pulse per second signal, sync to clk domain
clk : out std_logic; -- main clock (AXIS and AXI-MM)
mc_time : in std_logic_vector(39 downto 0);
-- Transceiver QPLL interface
qpll_out_clk : in std_logic; -- QPLL clock for transceivers
qpll_ref_clk : in std_logic; -- QPLL ref clock
qpll_reset : out std_logic; -- QPLL reset
qpll_lock : in std_logic; -- QPLL is locked
-- Debug output
debug_datarx : out std_logic_vector(15 downto 0);
debug_status : out std_logic_vector(6 downto 0);
error_detect : out std_logic;
-- SFP interfaces
sfp_txp : out std_logic;
sfp_txn : out std_logic;
sfp_rxp : in std_logic;
sfp_rxn : in std_logic;
sfp_rx_los : in std_logic;
sfp_mod_abs : in std_logic;
sfp_tx_disable : out std_logic;
sfp_tx_fault : in std_logic;
-- AXIS interface
m_axi_tid : out std_logic_vector(0 downto 0);
m_axi_tdest : out std_logic_vector(9 downto 0);
m_axi_tdata : out std_logic_vector(127 downto 0);
m_axi_tstrb : out std_logic_vector(15 downto 0);
m_axi_tkeep : out std_logic_vector(15 downto 0);
m_axi_tlast : out std_logic;
m_axi_tuser : out std_logic_vector(0 downto 0);
m_axi_tvalid : out std_logic;
m_axi_tready : in std_logic;
m_axis_m2s : out t_bpmpacket_axis_m2s;
m_axis_s2m : in t_bpmpacket_axis_s2m; -- warning: TREADY is ignored !
-- AXI bus interface
S_AXI_AWADDR : in std_logic_vector(7 downto 0);
S_AXI_AWPROT : in std_logic_vector(2 downto 0);
S_AXI_AWVALID : in std_logic;
S_AXI_AWREADY : out std_logic;
S_AXI_WDATA : in std_logic_vector(32-1 downto 0);
S_AXI_WSTRB : in std_logic_vector(32/8-1 downto 0);
S_AXI_WVALID : in std_logic;
S_AXI_WREADY : out std_logic;
S_AXI_BRESP : out std_logic_vector(1 downto 0);
S_AXI_BVALID : out std_logic;
S_AXI_BREADY : in std_logic;
S_AXI_ARADDR : in std_logic_vector(7 downto 0);
S_AXI_ARPROT : in std_logic_vector(2 downto 0);
S_AXI_ARVALID : in std_logic;
S_AXI_ARREADY : out std_logic;
S_AXI_RDATA : out std_logic_vector(32-1 downto 0);
S_AXI_RRESP : out std_logic_vector(1 downto 0);
S_AXI_RVALID : out std_logic;
S_AXI_RREADY : in std_logic
pi_s_top : in t_COMBPM_m2s;
po_s_top : out t_COMBPM_s2m
);
end top_combpm_electron;
architecture struct of top_combpm_electron is
--------------------------
-- INTERFACE ATTRIBUTES --
--------------------------
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_PARAMETER : STRING;
ATTRIBUTE X_INTERFACE_INFO of m_axi_tid : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TID";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tdest : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TDEST";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tdata : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TDATA";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tstrb : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TSTRB";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tkeep : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TKEEP";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tlast : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TLAST";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tuser : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TUSER";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tvalid : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TVALID";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tready : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TREADY";
ATTRIBUTE X_INTERFACE_INFO of gt_datarx : SIGNAL is "soleil:user:gtsfp:1.0 GT datarx";
ATTRIBUTE X_INTERFACE_INFO of gt_datatx : SIGNAL is "soleil:user:gtsfp:1.0 GT datatx";
ATTRIBUTE X_INTERFACE_INFO of gt_powergood : SIGNAL is "soleil:user:gtsfp:1.0 GT powergood";
ATTRIBUTE X_INTERFACE_INFO of gt_qplllock : SIGNAL is "soleil:user:gtsfp:1.0 GT qplllock";
ATTRIBUTE X_INTERFACE_INFO of gt_txclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT txclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt_rxclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT rxclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt_txresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT txresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt_rxresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT rxresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt_rxcdrlock : SIGNAL is "soleil:user:gtsfp:1.0 GT rxcdrlock";
ATTRIBUTE X_INTERFACE_INFO of gt_rxbyteisaligned : SIGNAL is "soleil:user:gtsfp:1.0 GT rxbyteisaligned";
ATTRIBUTE X_INTERFACE_INFO of gt_rxbyterealign : SIGNAL is "soleil:user:gtsfp:1.0 GT rxbyterealign";
ATTRIBUTE X_INTERFACE_INFO of gt_rxcommadet : SIGNAL is "soleil:user:gtsfp:1.0 GT rxcommadet";
ATTRIBUTE X_INTERFACE_INFO of gt_txfault : SIGNAL is "soleil:user:gtsfp:1.0 GT txfault";
ATTRIBUTE X_INTERFACE_INFO of gt_rxlos : SIGNAL is "soleil:user:gtsfp:1.0 GT rxlos";
ATTRIBUTE X_INTERFACE_INFO of gt_modabs : SIGNAL is "soleil:user:gtsfp:1.0 GT modabs";
ATTRIBUTE X_INTERFACE_INFO of gt_rstall : SIGNAL is "soleil:user:gtsfp:1.0 GT rstall";
ATTRIBUTE X_INTERFACE_INFO of gt_rxcommadeten : SIGNAL is "soleil:user:gtsfp:1.0 GT rxcommadeten";
ATTRIBUTE X_INTERFACE_INFO of gt_txdisable : SIGNAL is "soleil:user:gtsfp:1.0 GT txdisable";
ATTRIBUTE X_INTERFACE_INFO of rst_n : SIGNAL is "xilinx.com:signal:reset:1.0 rst_n RST";
ATTRIBUTE X_INTERFACE_PARAMETER of rst_n : SIGNAL is "POLARITY ACTIVE_LOW";
COMPONENT combpm_gtwizard
PORT (
gtwiz_userclk_tx_reset_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_tx_srcclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_tx_usrclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_tx_usrclk2_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_tx_active_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_reset_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_srcclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_usrclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_usrclk2_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_active_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_clk_freerun_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_all_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_tx_pll_and_datapath_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_tx_datapath_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_rx_pll_and_datapath_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_rx_datapath_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_qpll1lock_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_rx_cdr_stable_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_tx_done_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_rx_done_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_qpll1reset_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userdata_tx_in : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
gtwiz_userdata_rx_out : OUT STD_LOGIC_VECTOR(15 DOWNTO 0);
gthrxn_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gthrxp_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
qpll0clk_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
qpll0refclk_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
qpll1clk_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
qpll1refclk_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
rx8b10ben_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
rxbufreset_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
rxcommadeten_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
rxmcommaalignen_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
rxpcommaalignen_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
tx8b10ben_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
txctrl0_in : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
txctrl1_in : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
txctrl2_in : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
gthtxn_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gthtxp_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtpowergood_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
rxbufstatus_out : OUT STD_LOGIC_VECTOR(2 DOWNTO 0);
rxbyteisaligned_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
rxbyterealign_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
rxcdrlock_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
rxclkcorcnt_out : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
rxcommadet_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
rxctrl0_out : OUT STD_LOGIC_VECTOR(15 DOWNTO 0);
rxctrl1_out : OUT STD_LOGIC_VECTOR(15 DOWNTO 0);
rxctrl2_out : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
rxctrl3_out : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
rxpmaresetdone_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
txpmaresetdone_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0)
);
END COMPONENT;
------------------------
-- SIGNAL DECLARATION --
------------------------
signal sync_resetn : std_logic; -- This is async reset with sync deassertion
signal sync_reset : std_logic; -- This is async reset with sync deassertion
signal usrclk : std_logic;
signal rst : std_logic;
signal tx_disable : std_logic;
signal rx_commadeten : std_logic;
signal srst_gt : std_logic;
signal frame_counter : std_logic_vector(15 downto 0);
signal frame_seq_cnt : std_logic_vector(15 downto 0);
signal frame_valid_cnt : std_logic_vector(31 downto 0);
signal frame_invalid_cnt : std_logic_vector(31 downto 0);
signal frame_valid_rate : std_logic_vector(31 downto 0);
signal frame_invalid_rate : std_logic_vector(31 downto 0);
signal cnt_seq_mismatch : std_logic;
signal seq_discontinuity : std_logic;
signal frame_error : std_logic;
signal gt_datarx : std_logic_vector(15 downto 0);
signal gt_powergood : std_logic;
signal gt_rxcdrlock : std_logic;
signal gt_rxresetdone : std_logic;
signal gt_rxbyteisaligned : std_logic;
signal gt_rxbyterealign : std_logic;
signal gt_rxcommadet : std_logic;
signal addrmap_w : t_addrmap_combpm_in;
signal addrmap_r : t_addrmap_combpm_out;
begin
-- Reset invert polarity
rst <= not rst_n;
axiitf_inst: entity work.combpm_protocol_electron_ctrl_axi
-- This CDC is used to deassert async reset in sync with the transceiver clock.
xpm_cdc_async_rst_inst : xpm_cdc_async_rst
generic map (
G_ADDR_W => 8
DEST_SYNC_FF => 4,
INIT_SYNC_FF => 0,
RST_ACTIVE_HIGH => 0 -- DECIMAL; 0=active low reset, 1=active high reset
)
port map (
sfp_txfault_i => gt_txfault,
sfp_rxlos_i => gt_rxlos,
sfp_modabs_i => gt_modabs,
sfp_txdisable_o => tx_disable,
gt_powergood_i => gt_powergood,
gt_qplllock_i => gt_qplllock,
gt_txclkactive_i => gt_txclkactive,
gt_rxclkactive_i => gt_rxclkactive,
gt_rxcdrlock_i => gt_rxcdrlock,
gt_txresetdone_i => gt_txresetdone,
gt_rxresetdone_i => gt_rxresetdone,
gt_rxbyteisaligned_i => gt_rxbyteisaligned,
gt_rxbyterealign_i => gt_rxbyterealign,
gt_rxcommadet_i => gt_rxcommadet,
gt_rxcommadeten_o => rx_commadeten,
gt_rstall_o => srst_gt,
protocol_framecnt_i => frame_counter,
protocol_frameerror_i => frame_error,
clk => clk,
reset => rst,
S_AXI_AWADDR => S_AXI_AWADDR,
S_AXI_AWPROT => S_AXI_AWPROT,
S_AXI_AWVALID => S_AXI_AWVALID,
S_AXI_AWREADY => S_AXI_AWREADY,
S_AXI_WDATA => S_AXI_WDATA,
S_AXI_WSTRB => S_AXI_WSTRB,
S_AXI_WVALID => S_AXI_WVALID,
S_AXI_WREADY => S_AXI_WREADY,
S_AXI_BRESP => S_AXI_BRESP,
S_AXI_BVALID => S_AXI_BVALID,
S_AXI_BREADY => S_AXI_BREADY,
S_AXI_ARADDR => S_AXI_ARADDR,
S_AXI_ARPROT => S_AXI_ARPROT,
S_AXI_ARVALID => S_AXI_ARVALID,
S_AXI_ARREADY => S_AXI_ARREADY,
S_AXI_RDATA => S_AXI_RDATA,
S_AXI_RRESP => S_AXI_RRESP,
S_AXI_RVALID => S_AXI_RVALID,
S_AXI_RREADY => S_AXI_RREADY
dest_arst => sync_resetn,
dest_clk => usrclk,
src_arst => rst_n
);
-- Reset invert polarity
rst <= not rst_n;
sync_reset <= not sync_resetn;
-- Debug
debug_datarx <= gt_datarx;
debug_status(0) <= gt_rxcommadet;
debug_status(1) <= gt_rxcdrlock;
debug_status(2) <= gt_rxbyterealign;
debug_status(3) <= gt_rxbyteisaligned;
debug_status(4) <= frame_error;
debug_status(5) <= cnt_seq_mismatch;
debug_status(6) <= seq_discontinuity;
error_detect <= frame_error or cnt_seq_mismatch or seq_discontinuity;
-- Output clock
clk <= usrclk;
-- SFP direct connexion
sfp_tx_disable <= '1';
----------------------
-- AXI-MM INTERFACE --
----------------------
blk_desyrdl: block
begin
inst_aximm: entity desyrdl.combpm
port map(
pi_clock => usrclk,
pi_reset => sync_reset,
pi_s_top => pi_s_top,
po_s_top => po_s_top,
pi_addrmap => addrmap_w,
po_addrmap => addrmap_r
);
addrmap_w.ID.data.data <= x"507E1710";
addrmap_w.VERSION.data.data <= C_VERSION;
addrmap_w.SFP.RXLOS.data(0) <= sfp_rx_los;
addrmap_w.SFP.MODABS.data(0) <= sfp_mod_abs;
addrmap_w.GT.POWERGOOD.data(0) <= gt_powergood;
addrmap_w.GT.QPLLLOCK.data(0) <= qpll_lock;
addrmap_w.GT.RXCDRLOCK.data(0) <= gt_rxcdrlock;
addrmap_w.GT.RXRESETDONE.data(0) <= gt_rxresetdone;
addrmap_w.GT.RXBYTEISALIGNED.data(0) <= gt_rxbyteisaligned;
addrmap_w.GT.RXBYTEREALIGN.data(0) <= gt_rxbyterealign;
addrmap_w.GT.RXCOMMADET.data(0) <= gt_rxcommadet;
addrmap_w.PROTOCOL.FRAMEERROR.data(0) <= frame_error;
addrmap_w.PROTOCOL.SEQFRAMECNTERROR.data(0) <= cnt_seq_mismatch;
addrmap_w.PROTOCOL.SEQFRAMEDISCONT.data(0) <= seq_discontinuity;
addrmap_w.VALIDFRAMECNT.data.data <= frame_valid_cnt;
addrmap_w.INVALIDFRAMECNT.data.data <= frame_invalid_cnt;
addrmap_w.VALIDFRAMERATE.data.data <= frame_valid_rate;
addrmap_w.INVALIDFRAMERATE.data.data <= frame_invalid_rate;
addrmap_w.FRAMESEQ.data.data <= frame_seq_cnt;
end block blk_desyrdl;
--------------------------------------
-- LIBERA ELECTRON PROCOTOL DECODER --
--------------------------------------
protocol_inst: entity work.combpm_protocol_electron
port map(
rst_n => rst_n,
clk => clk,
rst_n => sync_resetn,
clk => usrclk,
pps => pps,
gt_datarx => gt_datarx,
gt_datatx => gt_datatx,
gt_powergood => gt_powergood,
gt_qplllock => gt_qplllock,
gt_txclkactive => gt_txclkactive,
gt_rxclkactive => gt_rxclkactive,
gt_txresetdone => gt_txresetdone,
gt_rxresetdone => gt_rxresetdone,
gt_rxcdrlock => gt_rxcdrlock,
gt_rxbyteisaligned => gt_rxbyteisaligned,
gt_rxbyterealign => gt_rxbyterealign,
gt_rxcommadet => gt_rxcommadet,
gt_txfault => gt_txfault,
gt_rxlos => gt_rxlos,
gt_modabs => gt_modabs,
gt_rstall => gt_rstall,
gt_rxcommadeten => gt_rxcommadeten,
gt_txdisable => gt_txdisable,
m_axi_tid => m_axi_tid,
m_axi_tdest => m_axi_tdest,
m_axi_tdata => m_axi_tdata,
m_axi_tstrb => m_axi_tstrb,
m_axi_tkeep => m_axi_tkeep,
m_axi_tlast => m_axi_tlast,
m_axi_tuser => m_axi_tuser,
m_axi_tvalid => m_axi_tvalid,
m_axi_tready => m_axi_tready,
tx_disable_i => tx_disable,
rx_commadeten_i => rx_commadeten,
srst_gt_i => srst_gt,
frame_counter_o => frame_counter,
frame_error_o => frame_error
m_axis_m2s => m_axis_m2s,
m_axis_s2m => m_axis_s2m,
mc_time => mc_time,
soft_reset => addrmap_w.PROTOCOL.SOFTRESET.data(0),
frame_seq_cnt => frame_seq_cnt,
frame_valid_cnt => frame_valid_cnt,
frame_invalid_cnt => frame_invalid_cnt,
frame_valid_rate => frame_valid_rate,
frame_invalid_rate => frame_invalid_rate,
cnt_seq_mismatch => cnt_seq_mismatch,
seq_discontinuity => seq_discontinuity,
frame_error => frame_error
);
---------------
-- GT WIZARD --
---------------
gtwizard_inst : combpm_gtwizard
PORT MAP (
-- Async reset
gtwiz_reset_all_in(0) => rst,
gtwiz_userclk_tx_reset_in(0) => rst,
gtwiz_userclk_rx_reset_in(0) => rst,
-- Free run clock
gtwiz_reset_clk_freerun_in(0) => free_100_clk,
-- Clock and data
gtwiz_userclk_rx_usrclk2_out(0) => usrclk,
gtwiz_userdata_tx_in => (others => '0'),
gtwiz_userdata_rx_out => gt_datarx,
-- QPLL COMMON
gtwiz_reset_qpll1lock_in(0) => qpll_lock,
gtwiz_reset_qpll1reset_out(0) => qpll_reset,
qpll1clk_in(0) => qpll_out_clk,
qpll1refclk_in(0) => qpll_ref_clk,
-- Control
gtwiz_reset_rx_datapath_in => addrmap_r.GT.RXRSTDATAPATH.data,
gtwiz_reset_rx_pll_and_datapath_in => addrmap_r.GT.RXRSTPLLDATAPATH.data,
rxbufreset_in => "0",
rxcommadeten_in => addrmap_r.GT.RXCOMMADETEN.data,
rx8b10ben_in => "1",
rxmcommaalignen_in => "1",
rxpcommaalignen_in => "1",
tx8b10ben_in => "1",
gtwiz_reset_tx_pll_and_datapath_in => "0",
gtwiz_reset_tx_datapath_in => "0",
-- Status
gtwiz_userclk_tx_active_out => open,
gtwiz_userclk_rx_active_out => addrmap_w.GT.RXCLKACTIVE.data,
gtwiz_reset_tx_done_out => open,
gtwiz_reset_rx_done_out(0) => gt_rxresetdone,
gtpowergood_out(0) => gt_powergood,
rxbyteisaligned_out(0) => gt_rxbyteisaligned,
rxbyterealign_out(0) => gt_rxbyterealign,
rxcdrlock_out(0) => gt_rxcdrlock,
rxcommadet_out(0) => gt_rxcommadet,
rxbufstatus_out => open,
rxclkcorcnt_out => open,
rxpmaresetdone_out => open,
txpmaresetdone_out => open,
-- SFP
gthrxn_in(0) => sfp_rxn,
gthrxp_in(0) => sfp_rxp,
gthtxn_out(0) => sfp_txn,
gthtxp_out(0) => sfp_txp,
-- Not used
qpll0clk_in => "0", -- not used
qpll0refclk_in => "0", -- not used
gtwiz_reset_rx_cdr_stable_out => open, -- Do not use
gtwiz_userclk_rx_srcclk_out => open,
gtwiz_userclk_rx_usrclk_out => open,
rxctrl0_out => open,
rxctrl1_out => open,
rxctrl2_out => open,
rxctrl3_out => open,
txctrl0_in => (others => '0'),
txctrl1_in => (others => '0'),
txctrl2_in => (others => '0'),
gtwiz_userclk_tx_srcclk_out => open,
gtwiz_userclk_tx_usrclk_out => open,
gtwiz_userclk_tx_usrclk2_out => open
);
end architecture struct;
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_FREQOS_IN">0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTGREFCLK1_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTGREFCLK_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTHRXN_IN">1</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTHTXP_OUT">1</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTNORTHREFCLK01_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTNORTHREFCLK0_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTNORTHREFCLK10_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTNORTHREFCLK11_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTNORTHREFCLK1_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTPOWERGOOD_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTREFCLK00_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTREFCLK01_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTREFCLK0_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTREFCLK10_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTREFCLK11_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTREFCLK1_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTREFCLKMONITOR_OUT">0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTRXRESETSEL_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTRXRESET_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTSOUTHREFCLK00_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTSOUTHREFCLK01_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTSOUTHREFCLK0_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTSOUTHREFCLK10_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTSOUTHREFCLK11_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTSOUTHREFCLK1_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTTXRESETSEL_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTTXRESET_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_BUFFBYPASS_RX_DONE_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_BUFFBYPASS_RX_ERROR_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_BUFFBYPASS_RX_RESET_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_BUFFBYPASS_RX_START_USER_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_BUFFBYPASS_TX_DONE_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_BUFFBYPASS_TX_ERROR_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_BUFFBYPASS_TX_RESET_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_BUFFBYPASS_TX_START_USER_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_GTHE3_CPLL_CAL_BUFG_CE_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_GTHE3_CPLL_CAL_CNT_TOL_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_GTHE3_CPLL_CAL_TXOUTCLK_PERIOD_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_GTHE4_CPLL_CAL_BUFG_CE_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_GTHE4_CPLL_CAL_CNT_TOL_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_GTHE4_CPLL_CAL_TXOUTCLK_PERIOD_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_GTYE4_CPLL_CAL_BUFG_CE_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_GTYE4_CPLL_CAL_CNT_TOL_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_GTYE4_CPLL_CAL_TXOUTCLK_PERIOD_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_RESET_ALL_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_RESET_CLK_FREERUN_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_RESET_QPLL0LOCK_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_RESET_QPLL0RESET_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_RESET_QPLL1LOCK_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_RESET_QPLL1RESET_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_RESET_RX_CDR_STABLE_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_RESET_RX_DATAPATH_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_RESET_RX_DONE_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_RESET_RX_DONE_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_RESET_RX_PLL_AND_DATAPATH_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_RESET_TX_DATAPATH_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_RESET_TX_DONE_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_RESET_TX_DONE_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_RESET_TX_PLL_AND_DATAPATH_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_USERCLK_RX_ACTIVE_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_USERCLK_RX_ACTIVE_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_USERCLK_RX_RESET_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_USERCLK_RX_SRCCLK_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_USERCLK_RX_USRCLK2_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_USERCLK_RX_USRCLK_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_USERCLK_TX_ACTIVE_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_USERCLK_TX_ACTIVE_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_USERCLK_TX_RESET_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_USERCLK_TX_SRCCLK_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_USERCLK_TX_USRCLK2_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_USERCLK_TX_USRCLK_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_USERDATA_RX_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTWIZ_USERDATA_TX_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTYRXN_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTYRXP_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTYTXN_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_GTYTXP_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_INCPCTRL_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_LOOPBACK_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_LOOPRSVD_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_LPBKRXTXSEREN_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_LPBKTXRXSEREN_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PCIEEQRXEQADAPTDONE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PCIERATEGEN3_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PCIERATEIDLE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PCIERATEQPLL0_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PCIERATEQPLL1_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PCIERATEQPLLPD_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PCIERATEQPLLRESET_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PCIERSTIDLE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PCIERSTTXSYNCSTART_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PCIESYNCTXSYNCDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PCIEUSERGEN3RDY_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PCIEUSERPHYSTATUSRST_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PCIEUSERRATEDONE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PCIEUSERRATESTART_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PCSRSVDIN2_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PCSRSVDIN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PCSRSVDOUT_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PHYSTATUS_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PINRSRVDAS_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PMARSVD0_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PMARSVD1_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PMARSVDIN_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PMARSVDOUT0_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_PMARSVDOUT1_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_POWERPRESENT_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL0CLKRSVD0_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL0CLKRSVD1_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL0CLK_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL0FBCLKLOST_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL0FBDIV_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL0FREQLOCK_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL0LOCKDETCLK_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL0LOCKEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL0LOCK_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL0OUTCLK_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL0OUTREFCLK_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL0PD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL0REFCLKLOST_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL0REFCLKSEL_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL0REFCLK_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL0RESET_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL1CLKRSVD0_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL1CLKRSVD1_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL1CLK_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL1FBCLKLOST_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL1FBDIV_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL1FREQLOCK_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL1LOCKDETCLK_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL1LOCKEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL1LOCK_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL1OUTCLK_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL1OUTREFCLK_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL1PD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL1REFCLKLOST_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL1REFCLKSEL_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL1REFCLK_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLL1RESET_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLLDMONITOR0_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLLDMONITOR1_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLLRSVD1_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLLRSVD2_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLLRSVD3_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_QPLLRSVD4_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RCALENB_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_REFCLKOUTMONITOR0_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_REFCLKOUTMONITOR1_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RESETEXCEPTION_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RESETOVRD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RSTCLKENTX_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RX8B10BEN_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RXAFECFOKEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RXBUFRESET_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RXBUFSTATUS_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RXBYTEISALIGNED_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RXBYTEREALIGN_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RXCDRFREQRESET_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RXCDRHOLD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RXCDRLOCK_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RXCDROVRDEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RXCDRPHDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RXCDRRESETRSV_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RXCDRRESET_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_RXCHANBONDSEQ_OUT">0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TCONGPO_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TCONPOWERUP_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TCONRESET_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TCONRSVDIN1_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TCONRSVDOUT0_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TSTIN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TX8B10BBYPASS_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TX8B10BEN_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXBUFDIFFCTRL_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXBUFSTATUS_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXCOMFINISH_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXCOMINIT_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXCOMSAS_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXCOMWAKE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXCTRL0_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXCTRL1_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXCTRL2_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDATAEXTENDRSVD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDATA_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDCCDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDCCFORCESTART_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDCCRESET_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDEEMPH_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDETECTRX_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDIFFCTRL_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDIFFPD_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDLYBYPASS_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDLYEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDLYHOLD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDLYOVRDEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDLYSRESETDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDLYSRESET_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDLYUPDOWN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXELECIDLE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXELFORCESTART_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXHEADER_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXINHIBIT_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXLATCLK_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXLFPSTRESET_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXLFPSU2LPEXIT_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXLFPSU3WAKE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXMAINCURSOR_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXMARGIN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXMUXDCDEXHOLD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXMUXDCDORWREN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXONESZEROS_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXOUTCLKFABRIC_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXOUTCLKPCS_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXOUTCLKSEL_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXOUTCLK_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPCSRESET_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPDELECIDLEMODE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHALIGNDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHALIGNEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHALIGN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHDLYPD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHDLYRESET_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHDLYTSTCLK_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHINITDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHINIT_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHOVRDEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPIPPMEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPIPPMOVRDEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPIPPMPD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPIPPMSEL_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPIPPMSTEPSIZE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPISOPD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPLLCLKSEL_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPMARESETDONE_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPMARESET_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPOLARITY_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPOSTCURSORINV_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPOSTCURSOR_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPRBSFORCEERR_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPRBSSEL_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPRECURSORINV_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPRECURSOR_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPRGDIVRESETDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPROGDIVRESET_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXQPIBIASEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXQPISENN_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXQPISENP_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXQPISTRONGPDOWN_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXQPIWEAKPUP_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXRATEDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXRATEMODE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXRATE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXRESETDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXSEQUENCE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXSWING_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXSYNCALLIN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXSYNCDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXSYNCIN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXSYNCMODE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXSYNCOUT_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXSYSCLKSEL_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXUSERRDY_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXUSRCLK2_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXUSRCLK_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBCFGSTREAMEN_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBDADDR_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBDEN_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBDI_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBDO_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBDRDY_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBDWE_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBENABLE_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBGPI_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBINTR_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBIOLMBRST_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMBRST_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMCAPTURE_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMDBGRST_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMDBGUPDATE_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMREGEN_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMSHIFT_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMSYSRST_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMTCK_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMTDI_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMTDO_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBRSVDOUT_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBTXUART_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLEMENT_UPDATED">20</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_USAGE_UPDATED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PRESET">None</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_RX_COMMA_PRESET_UPDATE">8</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_RX_USRCLK_FREQUENCY">106.0000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_TOTAL_NUM_CHANNELS">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_TOTAL_NUM_COMMONS">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_TX_USRCLK_FREQUENCY">106.0000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_UPDATE_IP_SYMBOL_drpclk_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCATE_COMMON">CORE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCATE_IN_SYSTEM_IBERT_CORE">NONE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCATE_RESET_CONTROLLER">CORE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCATE_RX_BUFFER_BYPASS_CONTROLLER">CORE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCATE_RX_USER_CLOCKING">CORE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCATE_TX_BUFFER_BYPASS_CONTROLLER">CORE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCATE_TX_USER_CLOCKING">CORE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCATE_USER_DATA_WIDTH_SIZING">CORE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.OOB_ENABLE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ORGANIZE_PORTS_BY">NAME</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCIE_64BIT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCIE_CORECLK_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCIE_ENABLE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCIE_GEN4_EIOS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCIE_USERCLK_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PRESET">None</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RESET_SEQUENCE_INTERVAL">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_BUFFER_BYPASS_MODE">MULTI</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_BUFFER_MODE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_BUFFER_RESET_ON_CB_CHANGE">ENABLE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_BUFFER_RESET_ON_COMMAALIGN">DISABLE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_BUFFER_RESET_ON_RATE_CHANGE">ENABLE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP_0_0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP_0_1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP_0_2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP_0_3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP_1_0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP_1_1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP_1_2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP_1_3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K_0_0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K_0_1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K_0_2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K_0_3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K_1_0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K_1_1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K_1_2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K_1_3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_LEN_SEQ">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK_0_0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK_0_1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK_0_2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK_0_3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK_1_0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK_1_1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK_1_2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK_1_3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MAX_LEVEL">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MAX_SKEW">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_NUM_SEQ">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_VAL">00000000000000000000000000000000000000000000000000000000000000000000000000000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_VAL_0_0">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_VAL_0_1">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_VAL_0_2">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_VAL_0_3">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_VAL_1_0">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_VAL_1_1">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_VAL_1_2">00000000</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_reset_tx_done_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userclk_rx_active_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userclk_rx_usrclk2_out">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userclk_rx_usrclk_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userclk_tx_active_out">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userclk_tx_reset_in">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userclk_tx_srcclk_out">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userclk_tx_usrclk2_out">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userclk_tx_usrclk_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userdata_tx_in">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtyrxn_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.pcieusergen3rdy_out">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.pcsrsvdin2_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.powerpresent_out">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.qpll1lock_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rx8b10ben_in">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxcdrlock_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxcdrphdone_out">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxchbondi_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxchbondslave_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxckcaldone_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxckcalreset_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxckcalstart_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxclkcorcnt_out">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxcominitdet_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxcommadet_out">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxcommadeten_in">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxcomwakedet_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxctrl0_out">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxctrl1_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxctrl3_out">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdata_out">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdfekhhold_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdfelpmreset_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdfetap12hold_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdfetap13hold_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdfetap7hold_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdfetap7ovrden_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdfetap8hold_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxelecidle_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxelecidlemode_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxeqtraining_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxheadervalid_out">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlfpsu3wakedet_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlpmen_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlpmgchold_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlpmgcovrden_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlpmhfhold_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlpmlfhold_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlpmlfklovrden_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlpmoshold_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlpmosovrden_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxmcommaalignen_in">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxmonitorsel_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxosintdone_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxosinten_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxosinthold_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_SDM1TOGGLE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_SDM1WIDTH_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_SIGVALIDCLK_IN">0</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TCONGPO_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TCONPOWERUP_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TCONRESET_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TCONRSVDIN1_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TCONRSVDOUT0_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TSTIN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TX8B10BBYPASS_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TX8B10BEN_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXBUFDIFFCTRL_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXBUFSTATUS_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXCOMFINISH_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXCOMINIT_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXCOMSAS_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXCOMWAKE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXCTRL0_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXCTRL1_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXCTRL2_IN">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDATAEXTENDRSVD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDATA_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDCCDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDCCFORCESTART_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDCCRESET_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDEEMPH_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDETECTRX_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDIFFCTRL_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDIFFPD_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDLYBYPASS_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDLYEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDLYHOLD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDLYOVRDEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDLYSRESETDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDLYSRESET_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXDLYUPDOWN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXELECIDLE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXELFORCESTART_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXHEADER_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXINHIBIT_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXLATCLK_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXLFPSTRESET_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXLFPSU2LPEXIT_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXLFPSU3WAKE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXMAINCURSOR_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXMARGIN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXMUXDCDEXHOLD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXMUXDCDORWREN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXONESZEROS_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXOUTCLKFABRIC_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXOUTCLKPCS_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXOUTCLKSEL_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXOUTCLK_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPCSRESET_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPDELECIDLEMODE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHALIGNDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHALIGNEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHALIGN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHDLYPD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHDLYRESET_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHDLYTSTCLK_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHINITDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHINIT_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPHOVRDEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPIPPMEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPIPPMOVRDEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPIPPMPD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPIPPMSEL_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPIPPMSTEPSIZE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPISOPD_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPLLCLKSEL_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPMARESETDONE_OUT">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPMARESET_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPOLARITY_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPOSTCURSORINV_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPOSTCURSOR_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPRBSFORCEERR_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPRBSSEL_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPRECURSORINV_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPRECURSOR_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPRGDIVRESETDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXPROGDIVRESET_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXQPIBIASEN_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXQPISENN_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXQPISENP_OUT">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXQPISTRONGPDOWN_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXQPIWEAKPUP_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXRATEDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXRATEMODE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXRATE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXRESETDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXSEQUENCE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXSWING_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXSYNCALLIN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXSYNCDONE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXSYNCIN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXSYNCMODE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXSYNCOUT_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXSYSCLKSEL_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXUSERRDY_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXUSRCLK2_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_TXUSRCLK_IN">-1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBCFGSTREAMEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBDADDR_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBDEN_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBDI_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBDO_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBDRDY_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBDWE_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBENABLE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBGPI_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBINTR_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBIOLMBRST_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMBRST_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMCAPTURE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMDBGRST_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMDBGUPDATE_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMREGEN_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMSHIFT_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMSYSRST_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMTCK_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMTDI_IN">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBMDMTDO_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBRSVDOUT_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLED_UBTXUART_OUT">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_ENABLEMENT_UPDATED">21</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PORT_USAGE_UPDATED">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_PRESET">None</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_RX_COMMA_PRESET_UPDATE">9</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_RX_USRCLK_FREQUENCY">106.0000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_TOTAL_NUM_CHANNELS">8</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_TOTAL_NUM_COMMONS">2</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_TX_USRCLK_FREQUENCY">106.0000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.INTERNAL_UPDATE_IP_SYMBOL_drpclk_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCATE_COMMON">CORE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCATE_IN_SYSTEM_IBERT_CORE">NONE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCATE_RESET_CONTROLLER">CORE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCATE_RX_BUFFER_BYPASS_CONTROLLER">CORE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCATE_RX_USER_CLOCKING">CORE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCATE_TX_BUFFER_BYPASS_CONTROLLER">CORE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCATE_TX_USER_CLOCKING">CORE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.LOCATE_USER_DATA_WIDTH_SIZING">CORE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.OOB_ENABLE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.ORGANIZE_PORTS_BY">NAME</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCIE_64BIT">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCIE_CORECLK_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCIE_ENABLE">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCIE_GEN4_EIOS">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PCIE_USERCLK_FREQ">250</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.PRESET">None</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RESET_SEQUENCE_INTERVAL">0</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_BUFFER_BYPASS_MODE">MULTI</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_BUFFER_MODE">1</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_BUFFER_RESET_ON_CB_CHANGE">ENABLE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_BUFFER_RESET_ON_COMMAALIGN">DISABLE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_BUFFER_RESET_ON_RATE_CHANGE">ENABLE</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP_0_0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP_0_1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP_0_2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP_0_3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP_1_0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP_1_1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP_1_2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_DISP_1_3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K_0_0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K_0_1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K_0_2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K_0_3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K_1_0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K_1_1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K_1_2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_K_1_3">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK">00000000</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK_0_0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK_0_1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK_0_2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK_0_3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK_1_0">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK_1_1">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK_1_2">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MASK_1_3">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MAX_LEVEL">4</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RX_CB_MAX_SKEW">1</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_reset_tx_done_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userclk_rx_active_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userclk_rx_usrclk2_out">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userclk_rx_usrclk_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userclk_tx_active_out">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userclk_tx_reset_in">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userclk_tx_srcclk_out">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userclk_tx_usrclk2_out">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userclk_tx_usrclk_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtwiz_userdata_tx_in">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtyrxn_in">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.gtytxn_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.pcieusergen3rdy_out">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.phystatus_out">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.powerpresent_out">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.qpll1lock_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.refclkoutmonitor1_out">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rx8b10ben_in">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxbufreset_in">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxbufstatus_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxbyterealign_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxcdrlock_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxcdrphdone_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxcdrreset_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxcdrresetrsv_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxchbondi_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxchbondo_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxchbondslave_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxckcaldone_out">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxclkcorcnt_out">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxcominitdet_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxcommadet_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxcomwakedet_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxctrl0_out">true</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxctrl1_out">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdata_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdataextendrsvd_out">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdfelfhold_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdfetap12hold_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdfetap13hold_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdfetap7hold_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdfetap8hold_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdfetap8ovrden_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdfetap9hold_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxdlysresetdone_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxelecidle_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxelecidlemode_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxeqtraining_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxheadervalid_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlatclk_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlfpstresetdet_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlfpsu2lpexitdet_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlfpsu3wakedet_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlpmen_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlpmgcovrden_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlpmhfhold_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlpmlfhold_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlpmlfklovrden_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlpmoshold_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxlpmosovrden_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxmcommaalignen_in">true</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxmonitorsel_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxoscalreset_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxoshold_in">false</spirit:configurableElementValue>
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<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxosintdone_out">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxosinten_in">false</spirit:configurableElementValue>
<spirit:configurableElementValue spirit:referenceId="PORT_ENABLEMENT.rxosinthold_in">false</spirit:configurableElementValue>
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<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_CC_LEN_SEQ" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_CC_NUM_SEQ" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_CC_PERIODICITY" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_CC_VAL" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_CC_VAL_0_0" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_CC_VAL_0_1" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_COMMA_ALIGN_WORD" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_COMMA_MASK" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_COMMA_M_ENABLE" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_COMMA_PRESET" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_COMMA_P_ENABLE" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_COMMA_VALID_ONLY" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_DATA_DECODING" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_INT_DATA_WIDTH" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_JTOL_FC" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_LINE_RATE" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_MASTER_CHANNEL" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_PLL_TYPE" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_QPLL_FRACN_NUMERATOR" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_REFCLK_FREQUENCY" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_REFCLK_SOURCE" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RX_USER_DATA_WIDTH" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.TXPROGDIV_FREQ_SOURCE" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.TXPROGDIV_FREQ_VAL" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.TX_DATA_ENCODING" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.TX_INT_DATA_WIDTH" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.TX_LINE_RATE" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.TX_MASTER_CHANNEL" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.TX_PLL_TYPE" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.TX_QPLL_FRACN_NUMERATOR" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.TX_REFCLK_FREQUENCY" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.TX_REFCLK_SOURCE" xilinx:valueSource="user"/>
<xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.TX_USER_DATA_WIDTH" xilinx:valueSource="user"/>
</xilinx:configElementInfos>
</xilinx:componentInstanceExtensions>
</spirit:vendorExtensions>
</spirit:componentInstance>
</spirit:componentInstances>
</spirit:design>
`include "combpm.vh" // Auto generated from FWK
addrmap combpm {
desyrdl_generate_hdl = true;
desyrdl_interface = "AXI4L";
name="BPM protocol decoder controller";
reg {
desc="Module identifier.";
field {hw=w;sw=r;} data[32];
} ID;
reg {
desc="Module version.";
field {hw=w;sw=r;} data[32];
} VERSION;
reg {
desc="SFP module status";
desyrdl_data_type="bitfields";
field {desc="RX lost signal";hw=w;sw=r;
} RXLOS;
field {desc="Module is absent";hw=w;sw=r;
} MODABS;
} SFP;
reg {
desc="GT transceivers status and control";
desyrdl_data_type="bitfields";
field {desc="Powergood signal";hw=w;sw=r;
} POWERGOOD;
field {desc="PLL lock signal";hw=w;sw=r;
} QPLLLOCK;
field {desc="RX clk active signal";hw=w;sw=r;
} RXCLKACTIVE;
field {desc="RX CDR lock signal";hw=w;sw=r;
} RXCDRLOCK;
field {desc="RX reset done signal";hw=w;sw=r;
} RXRESETDONE;
field {desc="RX byte is aligned signal";hw=w;sw=r;
} RXBYTEISALIGNED;
field {desc="RX byte realign signal";hw=w;sw=r;
} RXBYTEREALIGN;
field {desc="RX comma detected signal";hw=w;sw=r;
} RXCOMMADET;
field {desc="RX comma detection enable signal";hw=r;sw=rw;
} RXCOMMADETEN = 1;
field {desc="Reset RX datapath";hw=r;sw=rw;
} RXRSTDATAPATH = 1;
field {desc="Reset RX PLL and datapath";hw=r;sw=rw;
} RXRSTPLLDATAPATH = 1;
} GT;
reg {
desc="BPM protocol status and control";
desyrdl_data_type="bitfields";
field {desc="Frame error";hw=w;sw=r;
} FRAMEERROR;
field {desc="Sequence frame count mismatch";hw=w;sw=r;
} SEQFRAMECNTERROR;
field {desc="Sequence frame discontinuity";hw=w;sw=r;
} SEQFRAMEDISCONT;
field {desc="Soft reset";hw=r;sw=rw;
} SOFTRESET;
} PROTOCOL;
reg {
desc="BPM protocol valid frame counters";
field {hw=w;sw=r;} data[32];
} VALIDFRAMECNT;
reg {
desc="BPM protocol invalid frame counters";
field {hw=w;sw=r;} data[32];
} INVALIDFRAMECNT;
reg {
desc="BPM protocol valid frame rate";
field {hw=w;sw=r;} data[32];
} VALIDFRAMERATE;
reg {
desc="BPM protocol invalid frame rate";
field {hw=w;sw=r;} data[32];
} INVALIDFRAMERATE;
reg {
desc="BPM protocol frame sequence";
field {hw=w;sw=r;} data[16];
} FRAMESEQ;
};
addrmap combpm_protocol_electron_ctrl {
name="BPM Electron protocol decoder controller";
reg {
name="SFP status and control";
field {
desc="SFP TX fault signal";
hw=w;
sw=r;
} TXFAULT;
field {
desc="SFP RX lost signal";
hw=w;
sw=r;
} RXLOS;
field {
desc="SFP module absent signal";
hw=w;
sw=r;
} MODABS;
field {
desc="SFP TX disable signal";
hw=r;
sw=rw;
} TXDISABLE = 0;
} SFP;
reg {
name="GT status and control";
field {
desc="Powergood signal";
hw=w;
sw=r;
} POWERGOOD;
field {
desc="PLL lock signal";
hw=w;
sw=r;
} QPLLLOCK;
field {
desc="TX clk active signal";
hw=w;
sw=r;
} TXCLKACTIVE;
field {
desc="RX clk active signal";
hw=w;
sw=r;
} RXCLKACTIVE;
field {
desc="RX CDR lock signal";
hw=w;
sw=r;
} RXCDRLOCK;
field {
desc="TX reset done signal";
hw=w;
sw=r;
} TXRESETDONE;
field {
desc="RX reset done signal";
hw=w;
sw=r;
} RXRESETDONE;
field {
desc="RX byte is aligned signal";
hw=w;
sw=r;
} RXBYTEISALIGNED;
field {
desc="RX byte realign signal";
hw=w;
sw=r;
} RXBYTEREALIGN;
field {
desc="RX comma detected signal";
hw=w;
sw=r;
} RXCOMMADET;
field {
desc="RX comma detection enable signal";
hw=r;
sw=rw;
} RXCOMMADETEN = 1;
field {
desc="Reset all";
hw=r;
sw=rw;
} RSTALL = 1;
} GT;
reg {
name="Protocol status and control";
field {
desc="Frame counter";
hw=w;
sw=r;
} FRAMECNT[16];
field {
desc="Frame counter";
hw=w;
sw=r;
} FRAMEERROR;
} PROTOCOL;
};
#!/bin/bash
# Perform compilation of all vhdl sources
# For test, only two are needed, but it helps to check syntax
# This will create xsim.dir/work
xvhdl --log test.log hdl/combpm_protocol_electron_ctrl.vhd
xvhdl --log test.log hdl/combpm_protocol_electron.vhd
xvhdl --log test.log hdl/top_combpm_electron.vhd
xvhdl --log test.log test/tb_combpm_protocol_electron.vhd
# Perform Elaboration and snapshot creation
# This will create xsim.dir/work.tb_combpm_protocol_electron
xelab tb_combpm_protocol_electron -debug typical
# Launch simulation
xsim work.tb_combpm_protocol_electron -view test/tb_combpm_protocol_electron_behav.wcfg -gui
# Create a GTWizard IP for one quad.
set quad_name "X0Y4"
set module_name "combpm_gtwizard"
set gt_ip_config [ list \
CONFIG.CHANNEL_ENABLE $quad_name \
CONFIG.TX_MASTER_CHANNEL $quad_name \
CONFIG.RX_MASTER_CHANNEL $quad_name \
CONFIG.TX_LINE_RATE {2.125} \
CONFIG.TX_PLL_TYPE {QPLL1} \
CONFIG.TX_REFCLK_FREQUENCY {156.2500001} \
CONFIG.TX_DATA_ENCODING {8B10B} \
CONFIG.TX_USER_DATA_WIDTH {16} \
CONFIG.TX_INT_DATA_WIDTH {20} \
CONFIG.TX_QPLL_FRACN_NUMERATOR {6710886} \
CONFIG.RX_LINE_RATE {2.125} \
CONFIG.RX_PLL_TYPE {QPLL1} \
CONFIG.RX_REFCLK_FREQUENCY {156.2500001} \
CONFIG.RX_DATA_DECODING {8B10B} \
CONFIG.RX_USER_DATA_WIDTH {16} \
CONFIG.RX_INT_DATA_WIDTH {20} \
CONFIG.RX_QPLL_FRACN_NUMERATOR {6710886} \
CONFIG.RX_JTOL_FC {1.2717457} \
CONFIG.RX_OUTCLK_SOURCE {RXOUTCLKPMA} \
CONFIG.RX_COMMA_M_VAL {1010000011} \
CONFIG.RX_COMMA_P_VAL {0101111100} \
CONFIG.RX_COMMA_P_ENABLE {true} \
CONFIG.RX_COMMA_M_ENABLE {true} \
CONFIG.RX_COMMA_MASK {1111111111} \
CONFIG.RX_COMMA_ALIGN_WORD {2} \
CONFIG.RX_COMMA_SHOW_REALIGN_ENABLE {false} \
CONFIG.RX_CC_NUM_SEQ {1} \
CONFIG.RX_CC_LEN_SEQ {2} \
CONFIG.RX_CC_VAL {00000000000000000000000000000000000000000000000000000000000000100101010010111100} \
CONFIG.RX_CC_VAL_0_0 {10111100} \
CONFIG.RX_CC_K_0_0 {true} \
CONFIG.RX_CC_VAL_0_1 {10010101} \
CONFIG.RX_CC_K_0_1 {false} \
CONFIG.RX_CC_PERIODICITY {100} \
CONFIG.ENABLE_OPTIONAL_PORTS {rxcdrlock_out} \
CONFIG.RX_REFCLK_SOURCE "$quad_name clk1" \
CONFIG.TX_REFCLK_SOURCE "$quad_name clk1" \
CONFIG.LOCATE_TX_USER_CLOCKING {CORE} \
CONFIG.LOCATE_RX_USER_CLOCKING {CORE} \
CONFIG.LOCATE_COMMON {EXAMPLE_DESIGN} \
CONFIG.LOCATE_RESET_CONTROLLER {CORE} \
CONFIG.LOCATE_USER_DATA_WIDTH_SIZING {CORE} \
CONFIG.TXPROGDIV_FREQ_SOURCE {QPLL1} \
CONFIG.TXPROGDIV_FREQ_VAL {106.25} \
CONFIG.FREERUN_FREQUENCY {100} \
CONFIG.SECONDARY_QPLL_ENABLE {true} \
CONFIG.SECONDARY_QPLL_REFCLK_FREQUENCY {156.25} \
]
# Create IP
create_ip -name gtwizard_ultrascale -vendor xilinx.com -library ip -version 1.7 -module_name ${module_name}
# Configure the IP
set_property -dict $gt_ip_config [get_ips ${module_name}]
# If using 2 ports
# CONFIG.CHANNEL_ENABLE {${quad_name} X0Y5}
# CONFIG.RX_REFCLK_SOURCE {X0Y5 clk1 ${quad_name} clk1}
# CONFIG.TX_REFCLK_SOURCE {X0Y5 clk1 ${quad_name} clk1}
# Address width, on logic side (8 bits data access)
set b_addr_w 14
# Address width on AXI MM side (32 bits access)
set a_addr_w [expr $b_addr_w-2]
set a_depth [expr 1<<$a_addr_w]
set b_depth [expr 1<<$b_addr_w]
set xcipath [create_ip -name axi_bram_ctrl -vendor xilinx.com -library ip -version 4.1 -module_name combpm_packet_filter_axi_bram_ctrl]
set_property -dict [list \
CONFIG.PROTOCOL {AXI4} \
CONFIG.SUPPORTS_NARROW_BURST {0} \
CONFIG.SINGLE_PORT_BRAM {1} \
CONFIG.USE_ECC {0} \
CONFIG.BMG_INSTANCE {EXTERNAL} \
CONFIG.MEM_DEPTH $a_depth \
CONFIG.CLKIF.FREQ_HZ 250000000 \
CONFIG.DATA_WIDTH 32 \
] [get_ips combpm_packet_filter_axi_bram_ctrl]
set_property GENERATE_SYNTH_CHECKPOINT 0 [get_files $xcipath]
set xcipath [create_ip -name blk_mem_gen -vendor xilinx.com -library ip -version 8.4 -module_name combpm_packet_filter_blk_mem]
set_property -dict [list \
CONFIG.Memory_Type {True_Dual_Port_RAM} \
CONFIG.Use_Byte_Write_Enable {true} \
CONFIG.Byte_Size {8} \
CONFIG.Write_Width_A {32} \
CONFIG.Write_Depth_A $a_depth \
CONFIG.Read_Width_A {32} \
CONFIG.Operating_Mode_A {WRITE_FIRST} \
CONFIG.Write_Width_B {8} \
CONFIG.Read_Width_B {8} \
CONFIG.Operating_Mode_B {WRITE_FIRST} \
CONFIG.Enable_B {Use_ENB_Pin} \
CONFIG.Register_PortA_Output_of_Memory_Primitives {false} \
CONFIG.Register_PortA_Output_of_Memory_Core {false} \
CONFIG.Register_PortB_Output_of_Memory_Primitives {false} \
CONFIG.Port_B_Clock {250} \
CONFIG.Port_B_Write_Rate {0} \
CONFIG.Port_B_Enable_Rate {100} \
] [get_ips combpm_packet_filter_blk_mem]
set_property GENERATE_SYNTH_CHECKPOINT 0 [get_files $xcipath]