First modifications for FWK compatibility

* Remove Makefile.
* Add tcl/main.tcl with mandatory functions.
* change tcl to create the GT wizard.

Makefile

-###############################################################################
-# Global receipes
-none:
-	$(info You should specify what to make: ip, sim, clean, clean-all)
-
-sim:
-
-###############################################################################
-# Configuration
-hdlpkgsrc := 
-
-###############################################################################
-# Generate a source list, depending on the config
-rdlsrc := $(shell ls rdl/*.rdl)
-rdltarget := $(rdlsrc:rdl/%.rdl=hdl/%.vhd)
-hdlsrc := $(shell ls hdl/*.vhd) $(rdltarget) $(hdlpkgsrc)
-# TODO: depends on the configuration
-tcl/sources.tcl:
-	echo read_vhdl {$(hdlsrc)} > $@
-
-###############################################################################
-# Compute interface from rdl files
-hdl/%.vhd:rdl/%.rdl
-	hectare --axi-vhdl $@ $<
-
-###############################################################################
-# Package IP
-ip:component.xml
-
-component.xml:tcl/sources.tcl tcl/combpm.tcl tcl/generate_gtwizard.tcl $(hdlsrc)
-	vivado -mode batch -source tcl/combpm.tcl
-
-###############################################################################
-# Synthessize IP for test
-synth:component.xml
-	vivado -mode batch -source tcl/bloc_synthesis.tcl
-
-
-
-
-###############################################################################
-# Cleaner Rules
-clean:
-	rm -f vivado*.log vivado*.jou
-
-clean-ip:
-	rm -rf ip_proj ip_user_files xgui
-	rm -f component.xml
-
-clean-sim:
-	rm -f *.wdb
-
-clean-all:clean-ip clean
-	rm -f tcl/sources.tcl
-	rm -f hdl/combpm_protocol_electron_ctrl.vhd
-
-.PHONY: clean clean-ip clean-sim clean-all none ip sim synth

doc/main.adoc

+=  Documentation

tcl/generate_gtwizard.tcl → tcl/combpm_gtwizard.tcl

+# Create a GTWizard IP for one quad.
 set module_name "combpm_gtwizard"
+set quad_name X0Y4
 
 # Create IP
 create_ip -name gtwizard_ultrascale -vendor xilinx.com -library ip -version 1.7 -module_name ${module_name}
 
 # Configure the IP
 set_property -dict [list \
-    CONFIG.CHANNEL_ENABLE {X0Y4} \
-    CONFIG.TX_MASTER_CHANNEL {X0Y4} \
-    CONFIG.RX_MASTER_CHANNEL {X0Y4} \
+    CONFIG.CHANNEL_ENABLE {${quad_name}} \
+    CONFIG.TX_MASTER_CHANNEL {${quad_name}} \
+    CONFIG.RX_MASTER_CHANNEL {${quad_name}} \
     CONFIG.TX_LINE_RATE {2.125} \
     CONFIG.TX_PLL_TYPE {QPLL1} \
     CONFIG.TX_REFCLK_FREQUENCY {156.2500001} \
@@ -40,8 +42,8 @@ set_property -dict [list \
     CONFIG.RX_CC_K_0_1 {false} \
     CONFIG.RX_CC_PERIODICITY {100} \
     CONFIG.ENABLE_OPTIONAL_PORTS {rxcdrlock_out} \
-    CONFIG.RX_REFCLK_SOURCE {X0Y4 clk1} \
-    CONFIG.TX_REFCLK_SOURCE {X0Y4 clk1} \
+    CONFIG.RX_REFCLK_SOURCE {${quad_name} clk1} \
+    CONFIG.TX_REFCLK_SOURCE {${quad_name} clk1} \
     CONFIG.LOCATE_TX_USER_CLOCKING {CORE} \
     CONFIG.LOCATE_RX_USER_CLOCKING {CORE} \
     CONFIG.LOCATE_COMMON {EXAMPLE_DESIGN} \
@@ -55,10 +57,6 @@ set_property -dict [list \
     ] [get_ips ${module_name}]
 
 # If using 2 ports
-# CONFIG.CHANNEL_ENABLE {X0Y4 X0Y5}
-# CONFIG.RX_REFCLK_SOURCE {X0Y5 clk1 X0Y4 clk1}
-# CONFIG.TX_REFCLK_SOURCE {X0Y5 clk1 X0Y4 clk1}
-
-
-# Generate output products
-generate_target all [get_ips ${module_name}]
+# CONFIG.CHANNEL_ENABLE {${quad_name} X0Y5}
+# CONFIG.RX_REFCLK_SOURCE {X0Y5 clk1 ${quad_name} clk1}
+# CONFIG.TX_REFCLK_SOURCE {X0Y5 clk1 ${quad_name} clk1}

tcl/main.tcl

+################################################################################
+# Main tcl for the module
+################################################################################
+
+# ==============================================================================
+proc init {} {
+
+    # Configuration
+    # TODO Follow FWK
+    # variable quad_name
+    # set quad_name X0Y4
+}
+
+# ==============================================================================
+proc setSources {} {
+  variable Vhdl
+  lappend Vhdl ../hdl/combpm_protocol_electron.vhd
+  lappend Vhdl ../hdl/top_combpm_electron.vhd
+}
+
+# ==============================================================================
+proc setAddressSpace {} {
+}
+
+# ==============================================================================
+proc doOnCreate {} {
+  variable Vhdl
+  addSources Vhdl
+
+  # Create GT wizard IP
+  source ../tcl/combpm_gtwizard.tcl
+}
+
+# ==============================================================================
+proc doOnBuild {} {
+}
+
+# ==============================================================================
+proc setSim {} {
+}