Skip to content
Snippets Groups Projects
Commit a32e97c7 authored by BRONES Romain's avatar BRONES Romain
Browse files

Clean Project

parent 6e232755
No related branches found
No related tags found
No related merge requests found
...@@ -7,9 +7,7 @@ sim: ...@@ -7,9 +7,7 @@ sim:
############################################################################### ###############################################################################
# Configuration # Configuration
# TODO: better way to configure ?
hdlpkgsrc := hdlpkgsrc :=
#hdl_pkg/combpm_gtwrapper_CAENELS4SFP_1L_pkg.vhd
############################################################################### ###############################################################################
# Generate a source list, depending on the config # Generate a source list, depending on the config
......
This diff is collapsed.
-- TRANSCEIVER COMMON BLOCK
gthe4_common_wrapper_inst: entity work.combpm_gtwizard_gthe4_common_wrapper
port map(
GTHE4_COMMON_BGBYPASSB => "1",
GTHE4_COMMON_BGMONITORENB => "1",
GTHE4_COMMON_BGPDB => "1",
GTHE4_COMMON_BGRCALOVRD => "11111",
GTHE4_COMMON_BGRCALOVRDENB => "1",
GTHE4_COMMON_DRPADDR => "0000000000000000",
GTHE4_COMMON_DRPCLK => "0",
GTHE4_COMMON_DRPDI => "0000000000000000",
GTHE4_COMMON_DRPEN => "0",
GTHE4_COMMON_DRPWE => "0",
GTHE4_COMMON_GTGREFCLK0 => "0",
GTHE4_COMMON_GTGREFCLK1 => "0",
GTHE4_COMMON_GTNORTHREFCLK00 => "0",
GTHE4_COMMON_GTNORTHREFCLK01 => "0",
GTHE4_COMMON_GTNORTHREFCLK10 => "0",
GTHE4_COMMON_GTNORTHREFCLK11 => "0",
GTHE4_COMMON_GTREFCLK00 => (gtrefclk00_int [f_ub_cm( 1,(4*cm)+3) : f_lb_cm( 1,4*cm)]), // TODO
GTHE4_COMMON_GTREFCLK01 => (gtrefclk01_int [f_ub_cm( 1,(4*cm)+3) : f_lb_cm( 1,4*cm)]), // TODO
GTHE4_COMMON_GTREFCLK10 => "0",
GTHE4_COMMON_GTREFCLK11 => "0",
GTHE4_COMMON_GTSOUTHREFCLK00 => "0",
GTHE4_COMMON_GTSOUTHREFCLK01 => "0",
GTHE4_COMMON_GTSOUTHREFCLK10 => "0",
GTHE4_COMMON_GTSOUTHREFCLK11 => "0",
GTHE4_COMMON_PCIERATEQPLL0 => "000",
GTHE4_COMMON_PCIERATEQPLL1 => "000",
GTHE4_COMMON_PMARSVD0 => "00000000",
GTHE4_COMMON_PMARSVD1 => "00000000",
GTHE4_COMMON_QPLL0CLKRSVD0 => "0",
GTHE4_COMMON_QPLL0CLKRSVD1 => "0",
GTHE4_COMMON_QPLL0FBDIV => "00000000",
GTHE4_COMMON_QPLL0LOCKDETCLK => "0",
GTHE4_COMMON_QPLL0LOCKEN => "1",
GTHE4_COMMON_QPLL0PD => "0",
GTHE4_COMMON_QPLL0REFCLKSEL => "001",
GTHE4_COMMON_QPLL0RESET => (qpll0reset_int [f_ub_cm( 1,(4*cm)+3) : f_lb_cm( 1,4*cm)]), // TODO
GTHE4_COMMON_QPLL1CLKRSVD0 => "0",
GTHE4_COMMON_QPLL1CLKRSVD1 => "0",
GTHE4_COMMON_QPLL1FBDIV => "00000000",
GTHE4_COMMON_QPLL1LOCKDETCLK => "0",
GTHE4_COMMON_QPLL1LOCKEN => "1",
GTHE4_COMMON_QPLL1PD => "0",
GTHE4_COMMON_QPLL1REFCLKSEL => "001",
GTHE4_COMMON_QPLL1RESET => (qpll1reset_int [f_ub_cm( 1,(4*cm)+3) : f_lb_cm( 1,4*cm)]), // TODO
GTHE4_COMMON_QPLLRSVD1 => "00000000",
GTHE4_COMMON_QPLLRSVD2 => "00000",
GTHE4_COMMON_QPLLRSVD3 => "00000",
GTHE4_COMMON_QPLLRSVD4 => "00000000",
GTHE4_COMMON_RCALENB => "1",
GTHE4_COMMON_SDM0DATA => "0000000000000000000000000",
GTHE4_COMMON_SDM0RESET => "0",
GTHE4_COMMON_SDM0TOGGLE => "0",
GTHE4_COMMON_SDM0WIDTH => "00",
GTHE4_COMMON_SDM1DATA => "0010001011010000111001010",
GTHE4_COMMON_SDM1RESET => "0",
GTHE4_COMMON_SDM1TOGGLE => "0",
GTHE4_COMMON_SDM1WIDTH => "00",
GTHE4_COMMON_TCONGPI => "0000000000",
GTHE4_COMMON_TCONPOWERUP => "0",
GTHE4_COMMON_TCONRESET => "00",
GTHE4_COMMON_TCONRSVDIN1 => "00",
GTHE4_COMMON_DRPDO => open,
GTHE4_COMMON_DRPRDY => open,
GTHE4_COMMON_PMARSVDOUT0 => open,
GTHE4_COMMON_PMARSVDOUT1 => open,
GTHE4_COMMON_QPLL0FBCLKLOST => open,
GTHE4_COMMON_QPLL0LOCK => (qpll0lock_int [f_ub_cm( 1,(4*cm)+3) : f_lb_cm( 1,4*cm)]), // TODO
GTHE4_COMMON_QPLL0OUTCLK => (qpll0outclk_out [f_ub_cm( 1,(4*cm)+3) : f_lb_cm( 1,4*cm)]), // TODO
GTHE4_COMMON_QPLL0OUTREFCLK => (qpll0outrefclk_out [f_ub_cm( 1,(4*cm)+3) : f_lb_cm( 1,4*cm)]), // TODO open
GTHE4_COMMON_QPLL0REFCLKLOST => open,
GTHE4_COMMON_QPLL1FBCLKLOST => open,
GTHE4_COMMON_QPLL1LOCK => (qpll1lock_int [f_ub_cm( 1,(4*cm)+3) : f_lb_cm( 1,4*cm)]), // TODO
GTHE4_COMMON_QPLL1OUTCLK => (qpll1outclk_out [f_ub_cm( 1,(4*cm)+3) : f_lb_cm( 1,4*cm)]), // TODO
GTHE4_COMMON_QPLL1OUTREFCLK => (qpll1outrefclk_out [f_ub_cm( 1,(4*cm)+3) : f_lb_cm( 1,4*cm)]), // TODO open
GTHE4_COMMON_QPLL1REFCLKLOST => open,
GTHE4_COMMON_QPLLDMONITOR0 => open,
GTHE4_COMMON_QPLLDMONITOR1 => open,
GTHE4_COMMON_REFCLKOUTMONITOR0 => open,
GTHE4_COMMON_REFCLKOUTMONITOR1 => open,
GTHE4_COMMON_RXRECCLK0SEL => open,
GTHE4_COMMON_RXRECCLK1SEL => open,
GTHE4_COMMON_SDM0FINALOUT => open,
GTHE4_COMMON_SDM0TESTDATA => open,
GTHE4_COMMON_SDM1FINALOUT => open,
GTHE4_COMMON_SDM1TESTDATA => open,
GTHE4_COMMON_TCONGPO => open,
GTHE4_COMMON_TCONRSVDOUT0 => open
);
This diff is collapsed.
library ieee;
use ieee.std_logic_1164.all;
package combpm_gtwrapper_pkg is
constant C_NUM_CHAN : natural := 1;
COMPONENT combpm_gtwizard
PORT (
gtwiz_userclk_tx_reset_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_tx_srcclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_tx_usrclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_tx_usrclk2_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_tx_active_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_reset_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_srcclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_usrclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_usrclk2_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userclk_rx_active_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_clk_freerun_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_all_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_tx_pll_and_datapath_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_tx_datapath_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_rx_pll_and_datapath_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_rx_datapath_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_rx_cdr_stable_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_tx_done_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_reset_rx_done_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtwiz_userdata_tx_in : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
gtwiz_userdata_rx_out : OUT STD_LOGIC_VECTOR(15 DOWNTO 0);
gtrefclk01_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
--qpll1lock_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
qpll1outclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
qpll1outrefclk_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gthrxn_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
gthrxp_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
rx8b10ben_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
rxbufreset_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
rxcommadeten_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
rxmcommaalignen_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
rxpcommaalignen_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
tx8b10ben_in : IN STD_LOGIC_VECTOR(0 DOWNTO 0);
txctrl0_in : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
txctrl1_in : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
txctrl2_in : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
gthtxn_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gthtxp_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
gtpowergood_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
rxbufstatus_out : OUT STD_LOGIC_VECTOR(2 DOWNTO 0);
rxbyteisaligned_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
rxbyterealign_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
rxclkcorcnt_out : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
rxcommadet_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
rxctrl0_out : OUT STD_LOGIC_VECTOR(15 DOWNTO 0);
rxctrl1_out : OUT STD_LOGIC_VECTOR(15 DOWNTO 0);
rxctrl2_out : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
rxctrl3_out : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
rxpmaresetdone_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0);
txpmaresetdone_out : OUT STD_LOGIC_VECTOR(0 DOWNTO 0)
);
END COMPONENT;
end combpm_gtwrapper_pkg;
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment