* Wee need to have one put by default...

* Parse every data in uint32

* Use alias to log, redirect command outputs to log
* Parse through uio names to find which is axiapp and ddr4, make alias
  link in /dev

* This python script browse a simple file to write register using python
  deviceaccess.

* Recipe parse & build errors fixed
* Use A proper init.d script skeleton
* change RC update params

* Add a link to the correct mapt file
* Add a default configuration

* Disposed on a shared URL

* This parse a configuration file and then load the FPGA with the
  correct bitstream (centralnode or cellnode)

* Turns ou I fail to make a /dev/axiapp pop in the FS... For now let's
  keep it as /dev/uio0

* Patch the .mapt file to set BAR to 0
* Add timers to xml config
* fix the device name

* This rely on the ChimeraTK GenericServer-OPCUA CSA
* It adds to the target filesystem the map and config files

TODO
+Script to launch the server at startup