fix: Use a counter on serializer

* This reads the memory in the proper order.

hdl/data_serializer.vhd

@@ -64,12 +64,12 @@ begin
         elsif rising_edge(clk) then
 
             if run_serial = '1' then
-                if cnt = 0 then
+                if cnt = C_N_MM_PSC-1 then
                     -- stop at the end
                     run_serial <= '0';
                 else
                     if m_axis_tready = '1' then
-                        cnt <= cnt-1;
+                        cnt <= cnt+1;
                     end if;
                 end if;
 
@@ -80,7 +80,7 @@ begin
                 if corrout_valid= '1' then
                     -- start on valid
                     run_serial <= '1';
-                    cnt <= to_unsigned(C_N_MM_PSC-1, cnt'length);
+                    cnt <= (others => '0');
 
                 end if;