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Commit e7c1ed7a authored by BRONES Romain's avatar BRONES Romain
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WIP corrections for simulation 

* OK for one sequence
* No timeout yet
* No new features
parent 28e365ab
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hdl/comcellnode_packeter.vhd
+ 28
− 5
View file @ e7c1ed7a
......@@ -48,7 +48,7 @@ architecture rtl of comcellnode_packeter is
----------------------
-- TYPE DECLARATION --
----------------------
type t_state is (STANDBY, RUN, ERR_TO, ERR_SEQ);
type t_state is (STANDBY, FIRST, RUN, ERR_TO, ERR_SEQ);
------------------------
-- SIGNAL DECLARATION --
......@@ -86,6 +86,7 @@ architecture rtl of comcellnode_packeter is
signal frame_error : std_logic;
signal load_frame_cnt_ena : std_logic;
signal frame_timeout : std_logic;
signal m_tvalid_r : std_logic;
begin
......@@ -107,25 +108,27 @@ begin
bpm_reg_bpmframe <= slv2bpmframe(bpm_reg_m_tdata);
-- Seq FA sequence detector
new_seq <= (new_seq_valid_r and bpm_reg_m_tvalid) when bpm_reg_bpmframe.fa_seq = prev_seq_r else '0';
new_seq <= (new_seq_valid_r and bpm_reg_m_tvalid) when bpm_reg_bpmframe.fa_seq /= prev_seq_r else '0';
p_seq_detect:process(aclk, aresetn)
begin
if aresetn = '0' then
prev_seq_r <= (others => '0');
new_seq_valid_r <= '0';
m_tvalid_r <= '0';
elsif rising_edge(aclk) then
if (bpm_reg_m_tvalid and bpm_reg_m_tready) = '1' then
prev_seq_r <= bpm_reg_bpmframe.fa_seq;
new_seq_valid_r <= '1';
end if;
m_tvalid_r <= bpm_reg_m_tvalid;
end if;
end process;
----------------------------
-- DUMP/PASS AXIS CIRCUIT --
----------------------------
bpm_reg_m_tready <= dump or (pass and bpm_wconv_s_tready);
bpm_reg_m_tready <= (dump and m_tvalid_r) or (pass and bpm_wconv_s_tready);
reg_tvalid <= pass and bpm_reg_m_tvalid;
......@@ -196,7 +199,7 @@ begin
end if;
end process p_fsm_sync;
p_fsm_comb:process(packeter_run, new_seq, frame_cnt_zero, bpm_wconv_s_tready, frame_timeout)
p_fsm_comb:process(fsm_state, packeter_run, new_seq, frame_cnt_zero, bpm_wconv_s_tready, frame_timeout)
begin
case fsm_state is
when STANDBY =>
......@@ -206,7 +209,21 @@ begin
frame_error <= '0';
--
if (packeter_run and new_seq) = '1' then
fsm_state_next <= FIRST;
else
fsm_state_next <= STANDBY;
end if;
when FIRST =>
dump <= '0';
load_frame_cnt_ena <= '0';
pass <= '1';
frame_error <= '0';
--
if bpm_wconv_s_tready = '1' then
fsm_state_next <= RUN;
else
fsm_state_next <= FIRST;
end if;
when RUN =>
......@@ -219,8 +236,10 @@ begin
fsm_state_next <= ERR_SEQ;
elsif frame_timeout = '1' then
fsm_state_next <= ERR_TO;
elsif frame_cnt_zero = '0' then
elsif frame_cnt_zero = '1' and bpm_wconv_s_tready = '1' then
fsm_state_next <= STANDBY;
else
fsm_state_next <= RUN;
end if;
when ERR_TO =>
......@@ -231,6 +250,8 @@ begin
--
if bpm_wconv_s_tready = '1' then
fsm_state_next <= STANDBY;
else
fsm_state_next <= ERR_TO;
end if;
when ERR_SEQ =>
......@@ -241,6 +262,8 @@ begin
--
if bpm_wconv_s_tready = '1' then
fsm_state_next <= STANDBY;
else
fsm_state_next <= ERR_SEQ;
end if;
when others =>
......
hdl/pkg_bpmframe_stream.vhd
+ 4
− 4
View file @ e7c1ed7a
......@@ -57,12 +57,12 @@ package pkg_bpmframe_stream is
);
function slv2bpmframe(
signal tdata : std_logic_vector(C_W_BPMFRAME_TDATA-1 downto 0)
tdata : std_logic_vector(C_W_BPMFRAME_TDATA-1 downto 0)
)
return t_bpmframe;
function bpmframe2slv(
signal packet : t_bpmframe
packet : t_bpmframe
)
return std_logic_vector;
......@@ -73,7 +73,7 @@ package body pkg_bpmframe_stream is
function slv2bpmframe(
signal tdata : std_logic_vector(C_W_BPMFRAME_TDATA-1 downto 0)
tdata : std_logic_vector(C_W_BPMFRAME_TDATA-1 downto 0)
)
return t_bpmframe is
variable packet : t_bpmframe;
......@@ -87,7 +87,7 @@ package body pkg_bpmframe_stream is
end function;
function bpmframe2slv(
signal packet : t_bpmframe
packet : t_bpmframe
)
return std_logic_vector is
begin
......
sim/tb_comcellnode_packeter.vhd
+ 42
− 15
View file @ e7c1ed7a
......@@ -4,6 +4,8 @@ use ieee.numeric_std.all;
use ieee.math_real.uniform;
use ieee.math_real.ceil;
use work.pkg_bpmframe_stream.all;
entity tb_comcellnode_packeter is
end entity;
......@@ -12,7 +14,7 @@ architecture testbench of tb_comcellnode_packeter is
--------------------------
-- CONSTANT DECLARATION --
--------------------------
constant RX_COOLDOWN : positive = 3;
constant RX_COOLDOWN : positive := 3;
------------------------
-- SIGNAL DECLARATION --
......@@ -44,6 +46,9 @@ architecture testbench of tb_comcellnode_packeter is
signal tx_send : boolean := false;
signal rx_recv : boolean := false;
signal tx_last : boolean := false;
signal fa_seq : std_logic_vector(7 downto 0);
begin
......@@ -133,7 +138,20 @@ begin
wait until rising_edge(tb_clk);
-- Send some BPM frames
fa_seq <= x"01";
tx_send <= true;
for I in 0 to 3 loop
wait until rising_edge(tb_clk) and tb_s_axis_tready = '1';
end loop;
-- New sequence
fa_seq <= x"02";
for I in 0 to 2 loop
wait until rising_edge(tb_clk) and tb_s_axis_tready = '1';
end loop;
-- Enable RX
rx_recv <= true;
-- Never ending end
wait;
......@@ -162,23 +180,32 @@ begin
return slv;
end function;
variable v_bpm_frame : t_bpmframe;
variable v_frame_num : positive :=0;
begin
s_axis_tvalid <= '0';
tb_s_axis_tvalid <= '0';
while true loop
if not tx_send then
wait until tx_send;
wait until rising_edge(clk);
wait until rising_edge(tb_clk);
end if;
s_axis_tdata <= rand_slv(128);
s_axis_tvalid <= '1';
v_bpm_frame.pos_x := rand_slv(32);
v_bpm_frame.pos_y := rand_slv(32);
v_bpm_frame.bpm_id := std_logic_vector(to_unsigned(v_frame_num, 16));
v_bpm_frame.mc_timestamp := rand_slv(40);
v_bpm_frame.fa_seq := fa_seq;
v_frame_num := v_frame_num+1;
tb_s_axis_tdata <= bpmframe2slv(v_bpm_frame);
tb_s_axis_tvalid <= '1';
if tx_last then
s_axis_tlast <= '1';
tb_s_axis_tlast <= '1';
else
s_axis_tlast <= '0';
tb_s_axis_tlast <= '0';
end if;
wait until rising_edge(clk) and s_axis_tready='1';
s_axis_tvalid <= '0';
wait until rising_edge(tb_clk) and tb_s_axis_tready='1';
tb_s_axis_tvalid <= '0';
end loop;
end process p_tx_send;
......@@ -190,14 +217,14 @@ begin
begin
while true loop
if not rx_recv then
m_axis_tready <= '0';
wait until rx_recv and rising_edge(clk);
tb_m_axis_tready <= '0';
wait until rx_recv and rising_edge(tb_clk);
end if;
m_axis_tready <= '1';
wait until rising_edge(clk) and m_axis_tvalid ='1';
m_axis_tready <= '0';
tb_m_axis_tready <= '1';
wait until rising_edge(tb_clk) and tb_m_axis_tvalid ='1';
tb_m_axis_tready <= '0';
for I in 0 to RX_COOLDOWN loop
wait until rising_edge(clk);
wait until rising_edge(tb_clk);
end loop;
end loop;
end process p_rx_recv;
......
sim/tb_comcellnode_packeter.wcfg
+ 165
− 106
View file @ e7c1ed7a
......@@ -12,15 +12,15 @@
</db_ref>
</db_ref_list>
<zoom_setting>
<ZoomStartTime time="0fs"></ZoomStartTime>
<ZoomEndTime time="1321185fs"></ZoomEndTime>
<Cursor1Time time="10000000fs"></Cursor1Time>
<ZoomStartTime time="1434782fs"></ZoomStartTime>
<ZoomEndTime time="1641052fs"></ZoomEndTime>
<Cursor1Time time="1559151fs"></Cursor1Time>
</zoom_setting>
<column_width_setting>
<NameColumnWidth column_width="224"></NameColumnWidth>
<ValueColumnWidth column_width="134"></ValueColumnWidth>
<NameColumnWidth column_width="245"></NameColumnWidth>
<ValueColumnWidth column_width="262"></ValueColumnWidth>
</column_width_setting>
<WVObjectSize size="29" />
<WVObjectSize size="10" />
<wvobject type="logic" fp_name="/tb_comcellnode_packeter/tb_clk">
<obj_property name="ElementShortName">tb_clk</obj_property>
<obj_property name="ObjectShortName">tb_clk</obj_property>
......@@ -29,17 +29,38 @@
<obj_property name="ElementShortName">tb_rstn</obj_property>
<obj_property name="ObjectShortName">tb_rstn</obj_property>
</wvobject>
<wvobject type="group" fp_name="group141">
<obj_property name="label">Config</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject type="logic" fp_name="/tb_comcellnode_packeter/inst_dut/packeter_run">
<obj_property name="ElementShortName">packeter_run</obj_property>
<obj_property name="ObjectShortName">packeter_run</obj_property>
</wvobject>
<wvobject type="array" fp_name="/tb_comcellnode_packeter/tb_mac_dst">
<obj_property name="ElementShortName">tb_mac_dst[47:0]</obj_property>
<obj_property name="ObjectShortName">tb_mac_dst[47:0]</obj_property>
</wvobject>
<wvobject type="array" fp_name="/tb_comcellnode_packeter/tb_mac_src">
<obj_property name="ElementShortName">tb_mac_src[47:0]</obj_property>
<obj_property name="ObjectShortName">tb_mac_src[47:0]</obj_property>
</wvobject>
<wvobject type="array" fp_name="/tb_comcellnode_packeter/tb_mac_length">
<obj_property name="ElementShortName">tb_mac_length[15:0]</obj_property>
<obj_property name="ObjectShortName">tb_mac_length[15:0]</obj_property>
</wvobject>
<wvobject type="array" fp_name="/tb_comcellnode_packeter/tb_timeref">
<obj_property name="ElementShortName">tb_timeref[63:0]</obj_property>
<obj_property name="ObjectShortName">tb_timeref[63:0]</obj_property>
</wvobject>
<wvobject fp_name="divider91" type="divider">
<obj_property name="label">AXIS BPM input</obj_property>
<obj_property name="DisplayName">label</obj_property>
</wvobject>
<wvobject type="group" fp_name="group139">
<obj_property name="label">reg axis S</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="isExpanded"></obj_property>
<wvobject type="array" fp_name="/tb_comcellnode_packeter/tb_s_axis_tdata">
<obj_property name="ElementShortName">tb_s_axis_tdata[127:0]</obj_property>
<obj_property name="ObjectShortName">tb_s_axis_tdata[127:0]</obj_property>
<obj_property name="Radix">HEXRADIX</obj_property>
</wvobject>
<wvobject type="logic" fp_name="/tb_comcellnode_packeter/tb_s_axis_tvalid">
<obj_property name="ElementShortName">tb_s_axis_tvalid</obj_property>
......@@ -49,10 +70,28 @@
<obj_property name="ElementShortName">tb_s_axis_tready</obj_property>
<obj_property name="ObjectShortName">tb_s_axis_tready</obj_property>
</wvobject>
<wvobject fp_name="divider90" type="divider">
<obj_property name="label">AXIS S wconv</obj_property>
</wvobject>
<wvobject type="group" fp_name="group138">
<obj_property name="label">reg axis M</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="isExpanded"></obj_property>
<wvobject type="logic" fp_name="/tb_comcellnode_packeter/inst_dut/bpm_reg_m_tvalid">
<obj_property name="ElementShortName">bpm_reg_m_tvalid</obj_property>
<obj_property name="ObjectShortName">bpm_reg_m_tvalid</obj_property>
</wvobject>
<wvobject type="logic" fp_name="/tb_comcellnode_packeter/inst_dut/bpm_reg_m_tready">
<obj_property name="ElementShortName">bpm_reg_m_tready</obj_property>
<obj_property name="ObjectShortName">bpm_reg_m_tready</obj_property>
</wvobject>
<wvobject type="array" fp_name="/tb_comcellnode_packeter/inst_dut/bpm_reg_m_tdata">
<obj_property name="ElementShortName">bpm_reg_m_tdata[127:0]</obj_property>
<obj_property name="ObjectShortName">bpm_reg_m_tdata[127:0]</obj_property>
</wvobject>
</wvobject>
<wvobject type="group" fp_name="group137">
<obj_property name="label">wconv axis S</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="isExpanded"></obj_property>
<wvobject type="logic" fp_name="/tb_comcellnode_packeter/inst_dut/bpm_wconv_s_tvalid">
<obj_property name="ElementShortName">bpm_wconv_s_tvalid</obj_property>
<obj_property name="ObjectShortName">bpm_wconv_s_tvalid</obj_property>
......@@ -73,34 +112,36 @@
<obj_property name="ElementShortName">bpm_wconv_s_tuser[9:0]</obj_property>
<obj_property name="ObjectShortName">bpm_wconv_s_tuser[9:0]</obj_property>
</wvobject>
<wvobject fp_name="divider92" type="divider">
<obj_property name="label">Config</obj_property>
</wvobject>
<wvobject type="group" fp_name="group140">
<obj_property name="label">wconv axis M</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="isExpanded"></obj_property>
<wvobject type="logic" fp_name="/tb_comcellnode_packeter/inst_dut/bpm_wconv_m_tvalid">
<obj_property name="ElementShortName">bpm_wconv_m_tvalid</obj_property>
<obj_property name="ObjectShortName">bpm_wconv_m_tvalid</obj_property>
</wvobject>
<wvobject type="logic" fp_name="/tb_comcellnode_packeter/inst_dut/packeter_run">
<obj_property name="ElementShortName">packeter_run</obj_property>
<obj_property name="ObjectShortName">packeter_run</obj_property>
<wvobject type="logic" fp_name="/tb_comcellnode_packeter/inst_dut/bpm_wconv_m_tready">
<obj_property name="ElementShortName">bpm_wconv_m_tready</obj_property>
<obj_property name="ObjectShortName">bpm_wconv_m_tready</obj_property>
</wvobject>
<wvobject type="array" fp_name="/tb_comcellnode_packeter/tb_mac_dst">
<obj_property name="ElementShortName">tb_mac_dst[47:0]</obj_property>
<obj_property name="ObjectShortName">tb_mac_dst[47:0]</obj_property>
<wvobject type="logic" fp_name="/tb_comcellnode_packeter/inst_dut/bpm_wconv_m_tlast">
<obj_property name="ElementShortName">bpm_wconv_m_tlast</obj_property>
<obj_property name="ObjectShortName">bpm_wconv_m_tlast</obj_property>
</wvobject>
<wvobject type="array" fp_name="/tb_comcellnode_packeter/tb_mac_src">
<obj_property name="ElementShortName">tb_mac_src[47:0]</obj_property>
<obj_property name="ObjectShortName">tb_mac_src[47:0]</obj_property>
<wvobject type="array" fp_name="/tb_comcellnode_packeter/inst_dut/bpm_wconv_m_tdata">
<obj_property name="ElementShortName">bpm_wconv_m_tdata[15:0]</obj_property>
<obj_property name="ObjectShortName">bpm_wconv_m_tdata[15:0]</obj_property>
</wvobject>
<wvobject type="array" fp_name="/tb_comcellnode_packeter/tb_mac_length">
<obj_property name="ElementShortName">tb_mac_length[15:0]</obj_property>
<obj_property name="ObjectShortName">tb_mac_length[15:0]</obj_property>
<wvobject type="array" fp_name="/tb_comcellnode_packeter/inst_dut/bpm_wconv_m_tuser">
<obj_property name="ElementShortName">bpm_wconv_m_tuser[1:0]</obj_property>
<obj_property name="ObjectShortName">bpm_wconv_m_tuser[1:0]</obj_property>
</wvobject>
<wvobject fp_name="divider85" type="divider">
<obj_property name="label">Interco</obj_property>
<obj_property name="DisplayName">label</obj_property>
</wvobject>
<wvobject fp_name="divider111" type="divider">
<wvobject type="group" fp_name="group142">
<obj_property name="label">FSM</obj_property>
<obj_property name="DisplayName">label</obj_property>
</wvobject>
<obj_property name="isExpanded"></obj_property>
<wvobject type="other" fp_name="/tb_comcellnode_packeter/inst_dut/fsm_state">
<obj_property name="ElementShortName">fsm_state</obj_property>
<obj_property name="ObjectShortName">fsm_state</obj_property>
......@@ -125,16 +166,34 @@
<obj_property name="ElementShortName">frame_timeout</obj_property>
<obj_property name="ObjectShortName">frame_timeout</obj_property>
</wvobject>
<wvobject fp_name="divider119" type="divider">
<obj_property name="label">Frame cnt, new seq</obj_property>
<obj_property name="DisplayName">label</obj_property>
</wvobject>
<wvobject type="group" fp_name="group148">
<obj_property name="label">Frame Cnt</obj_property>
<obj_property name="DisplayName">label</obj_property>
<obj_property name="isExpanded"></obj_property>
<wvobject type="array" fp_name="/tb_comcellnode_packeter/inst_dut/frame_cnt">
<obj_property name="ElementShortName">frame_cnt[7:0]</obj_property>
<obj_property name="ObjectShortName">frame_cnt[7:0]</obj_property>
</wvobject>
<wvobject type="logic" fp_name="/tb_comcellnode_packeter/inst_dut/frame_cnt_zero">
<obj_property name="ElementShortName">frame_cnt_zero</obj_property>
<obj_property name="ObjectShortName">frame_cnt_zero</obj_property>
</wvobject>
</wvobject>
<wvobject type="group" fp_name="group150">
<obj_property name="label">New Seq</obj_property>
<obj_property name="DisplayName">label</obj_property>
<wvobject type="logic" fp_name="/tb_comcellnode_packeter/inst_dut/new_seq">
<obj_property name="ElementShortName">new_seq</obj_property>
<obj_property name="ObjectShortName">new_seq</obj_property>
</wvobject>
<wvobject type="array" fp_name="/tb_comcellnode_packeter/inst_dut/prev_seq_r">
<obj_property name="ElementShortName">prev_seq_r[7:0]</obj_property>
<obj_property name="ObjectShortName">prev_seq_r[7:0]</obj_property>
</wvobject>
<wvobject type="logic" fp_name="/tb_comcellnode_packeter/inst_dut/new_seq_valid_r">
<obj_property name="ElementShortName">new_seq_valid_r</obj_property>
<obj_property name="ObjectShortName">new_seq_valid_r</obj_property>
</wvobject>
</wvobject>
</wave_config>
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