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DG
FOFB
comcellnode_ethernet
Commits
a96248b9
Commit
a96248b9
authored
Jun 16, 2022
by
BRONES Romain
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Rename for addrmap
parent
b9c1a94b
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3 changed files
rdl/comcellnode.rdl
+2
-1
2 additions, 1 deletion
rdl/comcellnode.rdl
rdl/xilinx_ethsubsyst.rdl
+1
-1
1 addition, 1 deletion
rdl/xilinx_ethsubsyst.rdl
tcl/main.tcl
+1
-1
1 addition, 1 deletion
tcl/main.tcl
with
4 additions
and
3 deletions
rdl/comcellnode.rdl
+
2
−
1
View file @
a96248b9
`include "COMCELLNODE.vh"
addrmap COMCELLNODE {
desyrdl_generate_hdl = true;
desyrdl_interface = "AXI4L";
xil_ethsubsyst ETH @0x1000;
xil
inx
_ethsubsyst ETH @0x1000;
// MAC address
reg {
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rdl/xilinx_ethsubsyst.rdl
+
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−
1
View file @
a96248b9
addrmap xil_ethsubsyst {
addrmap xil
inx
_ethsubsyst {
desyrdl_generate_hdl = false;
desyrdl_interface = "AXI4L";
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tcl/main.tcl
+
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−
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a96248b9
...
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@@ -30,7 +30,7 @@ proc setSources {} {
proc setAddressSpace
{}
{
variable AddressSpace
addAddressSpace AddressSpace
"COMCELLNODE"
RDL
{}
../rdl/comcellnode.rdl
addAddressSpace AddressSpace
"xil_ethsubsyst"
RDL
{}
../rdl/xilinx_ethsubsyst.rdl
addAddressSpace AddressSpace
"xil
inx
_ethsubsyst"
RDL
{}
../rdl/xilinx_ethsubsyst.rdl
}
# ==============================================================================
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