combpm.rdl

`include "combpm.vh" // Auto generated from FWK

addrmap combpm {

    desyrdl_generate_hdl = true;
    desyrdl_interface = "AXI4L";

    name="BPM protocol decoder controller";

    reg {
        name="SFP status and control";

        field {
            desc="SFP RX lost signal";
            hw=w;
            sw=r;
        } RXLOS;

        field {
            desc="SFP module absent signal";
            hw=w;
            sw=r;
        } MODABS;


    } SFP;

    reg {
        name="GT status and control";

        field {
            desc="Powergood signal";
            hw=w;
            sw=r;
        } POWERGOOD;

        field {
            desc="PLL lock signal";
            hw=w;
            sw=r;
        } QPLLLOCK;

        field {
            desc="RX clk active signal";
            hw=w;
            sw=r;
        } RXCLKACTIVE;

        field {
            desc="RX CDR lock signal";
            hw=w;
            sw=r;
        } RXCDRLOCK;

        field {
            desc="RX reset done signal";
            hw=w;
            sw=r;
        } RXRESETDONE;

        field {
            desc="RX byte is aligned signal";
            hw=w;
            sw=r;
        } RXBYTEISALIGNED;

        field {
            desc="RX byte realign signal";
            hw=w;
            sw=r;
        } RXBYTEREALIGN;

        field {
            desc="RX comma detected signal";
            hw=w;
            sw=r;
        } RXCOMMADET;

        field {
            desc="RX comma detection enable signal";
            hw=r;
            sw=rw;
        } RXCOMMADETEN = 1;

        field {
            desc="Reset RX datapath";
            hw=r;
            sw=rw;
        } RXRSTDATAPATH = 1;

        field {
            desc="Reset RX PLL and datapath";
            hw=r;
            sw=rw;
        } RXRSTPLLDATAPATH = 1;

    } GT;

    reg {
        name="Protocol status and control";

        field {
            desc="Frame error";
            hw=w;sw=r;
        } FRAMEERROR;

        field {
            desc="Sequence frame count mismatch";
            hw=w;sw=r;
        } SEQFRAMECNTERROR;

        field {
            desc="Sequence frame discontinuity";
            hw=w;sw=r;
        } SEQFRAMEDISCONT;

        field {
            desc="Soft reset";
            hw=r;sw=rw;
        } SOFTRESET;

    } PROTOCOL;

    reg {
        name="Protocol frame counters";

        field {
            desc="Valid frame counter";
            hw=w;sw=r;
        } CNT[32];
    } VALIDFRAMECNT;

    reg {
        field {
            desc="Invalid frame counter";
            hw=w;sw=r;
        } CNT[32];
    } INVALIDFRAMECNT;

    reg {
        name="Protocol frame rate";

        field {
            desc="Valid frame rate";
            hw=w;sw=r;
        } RATE[32];
    } VALIDFRAMERATE;

    reg {
        field {
            desc="Invalid frame rate";
            hw=w;sw=r;
        } RATE[32];
    } INVALIDFRAMERATE;

    reg {
        name="Protocol frame sequence";

        field {
            desc="Number of frames in sequence";
            hw=w;sw=r;
        } FRAMECNT[16];

    } FRAMESEQ;


};