fix: CellNode upstream interconnect

* Set clock as Async

src/app_fofbnode/tcl/gen_ip_cellnode.tcl

@@ -2,29 +2,6 @@
 
 set ProjectDirPath [file join ${::fwfwk::PrjBuildPath} ${::fwfwk::PrjBuildName}]
 
-## ------------------------------------- ##
-## UPSTREAM FIFO
-## ------------------------------------- ##
-set ipName "axis_upstream_fifo"
-
-set xcipath [create_ip \
-    -name axis_data_fifo \
-    -vendor xilinx.com \
-    -library ip -version 2.0 \
-    -module_name $ipName]
-
-set_property -dict [list \
-    CONFIG.TDATA_NUM_BYTES {10} \
-    CONFIG.TUSER_WIDTH {8} \
-    CONFIG.FIFO_DEPTH {64} \
-    CONFIG.IS_ACLK_ASYNC {1} \
-    CONFIG.HAS_AFULL {1} \
-] [get_ips $ipName]
-
-generate_target all [get_files  ${ProjectDirPath}.srcs/sources_1/ip/$ipName/$ipName.xci]
-export_ip_user_files -of_objects [get_files ${ProjectDirPath}.srcs/sources_1/ip/$ipName/$ipName.xci] -no_script -sync -force -quiet
-create_ip_run [get_files -of_objects [get_fileset sources_1] ${ProjectDirPath}.srcs/sources_1/ip/$ipName/$ipName.xci]
-
 ## ------------------------------------- ##
 ## UPSTREAM INTERCONNECT
 ## ------------------------------------- ##
@@ -48,6 +25,11 @@ set_property -dict [list \
     CONFIG.HAS_TUSER {false} \
     CONFIG.SWITCH_TUSER_BITS_PER_BYTE {1} \
     CONFIG.ARBITER_TYPE {Fixed} \
+    CONFIG.C_S00_AXIS_IS_ACLK_ASYNC {1} \
+    CONFIG.C_S01_AXIS_IS_ACLK_ASYNC {1} \
+    CONFIG.C_S02_AXIS_IS_ACLK_ASYNC {1} \
+    CONFIG.C_S03_AXIS_IS_ACLK_ASYNC {1} \
+    CONFIG.C_S04_AXIS_IS_ACLK_ASYNC {1} \
     CONFIG.S00_AXIS_FIFO_MODE {1_(Normal)} \
     CONFIG.C_S00_AXIS_FIFO_DEPTH {64} \
     CONFIG.S01_AXIS_FIFO_MODE {1_(Normal)} \