* Remove DT_FROM_BD_ENABLE. We don't have anything particular in BD.
* Adding pl-conf.dtsi in system-top otherwise is gets lost and unused.

* Usefull if rebuilding

* Use ch8, with correct address offset from AXI MM PS

* Disposed on a shared URL

* Else it is not possible to  make the device tree blob when several
  variants are given. Getting a duplicate node error.

* This generate a UIO device for the APP area.
* UIO is accessible in /dev/axiapp

It's better to fix it in Techlab layer.

* As we don't use block design, this IP is not detected automatically.
* The IP is located at a fixed address on the bus.

* Actualize the application
* No more BD inside
* Has a Debug Bridge at 0xA1000000

The one included by techlab-bsp matches their FPGA BSP.
I'm using MSK BSP

* move recipes to a identical filepath