cleaning the testbench

* Update to latest top level (few status more)
* Set TUSER to 16 bits

sim/gen_testfile.py

@@ -24,7 +24,7 @@ seqframe = seqframe.reshape(nseq-1, seqframe.shape[1]//4, 4)
 fp = open("testinput_001.txt", 'w')
 for S, sdata in zip(range(nseq), seqdata):
     for b, bdata in zip(range(bps), sdata):
-        fp.write("{:02X} ".format(S))
+        fp.write("{:04X} ".format(S))
         fp.write(("{:04X}"*5).format(*bdata[::-1]))
         fp.write("\n")
 fp.close()
@@ -39,7 +39,7 @@ for sdata in seqframe:
 fp.close()
 
 
-# Generate input file
+# Generate output file
 fp = open("testoutput_001.txt", 'w')
 for S, sdata in zip(range(nseq-1), seqdata[2:]):
     for b, bdata in zip(range(bps), sdata):

sim/simulate.tcl

@@ -5,12 +5,11 @@ set_property source_mgmt_mode All [current_project]
 
 read_vhdl -vhdl2008 {sim/tb_ccn.vhd}
 read_vhdl {hdl/ccn_unpack.vhd hdl/ccn_pack.vhd}
-read_vhdl {hdl/pkg_bpmpacket_stream.vhd}
 add_files -fileset sim_1 {sim/testinput_001.txt sim/testframe_001.txt sim/testoutput_001.txt }
 
 set CCN_DPKT_W 80
 set CCN_UPKT_W 80
-set CCN_DPKT_TU_W 8
+set CCN_DPKT_TU_W 16
 set CCN_UPKT_TU_W 8
 set CCN_FRAME_W 64
 set CCN_FRAME_HEADER_W 192

sim/tb_ccn.vhd

@@ -20,7 +20,7 @@ architecture testbench of tb_ccn is
 
     constant PROTOCOL_ID         :  std_logic_vector(7 downto 0) := x"75";
     constant IPKT_TDATA_W        :  natural := 80;
-    constant IPKT_TUSER_W        :  natural := 8;
+    constant IPKT_TUSER_W        :  natural := 16;
     constant OPKT_TDATA_W        :  natural := 80;
     constant OPKT_TUSER_W        :  natural := 8;
     constant FRAME_TDATA_W       :  natural := 64;
@@ -115,13 +115,13 @@ begin
         packet_timeout       => tb_pack_timeout,
         expect_pkt_cnt       => tb_pack_expect_pkt,
         timeref              => std_logic_vector(tb_timeref),
+        latch_seq            => '0',
 
         -- AXIS Packet input
         s_axis_tdata         => tb_s_axis_tdata,
         s_axis_tuser         => tb_s_axis_tuser,
         s_axis_tvalid        => tb_s_axis_tvalid,
         s_axis_tready        => tb_s_axis_tready,
-        s_axis_tlast         => tb_s_axis_tlast,
 
         -- AXIS Frame output
         m_axis_clk           => tb_m_clk,
@@ -132,6 +132,8 @@ begin
         m_axis_tlast         => eth_axis_tlast,
         m_axis_tuser         => eth_axis_tuser,
 
+        latched_seq1         => open,
+        latched_seq2         => open,
         status_err_seq       => tb_pack_err_seq,
         status_err_timeout   => tb_pack_err_timeout,
         status_frame_count   => tb_pack_frame_count
@@ -165,6 +167,7 @@ begin
         err_mac_dst     => tb_unpack_err_mac_dst,
         err_mac_src     => tb_unpack_err_mac_src,
         pkt_mcts        => tb_unpack_mcts,
+        frame_counter   => open,
 
         -- AXIS Frame input
         s_axis_clk      => tb_m_clk,

sim/tb_test.vhd

-library ieee;
-use ieee.std_logic_1164.all;
-use ieee.std_logic_textio.all;
-use std.textio.all;
-
-
-entity tb_test is
-end entity;
-
-architecture testbench of tb_test is
-
-    signal tb_clk : std_logic := '0';
-    signal posx : std_logic_vector(31 downto 0);
-    signal sendfile: boolean := false;
-    file testinput : TEXT;
-    --file testinput : TEXT open READ_MODE is "testinput_001.txt";
-
-begin
-
-    tb_clk <= not tb_clk after 5 ns;
-
-    main_proc:process
-    begin
-
-        wait for 50 ns;
-
-        file_open(testinput, "testinput_001.txt", read_mode);
-        sendfile <= true;
-        wait for 50 ns;
-
-        wait;
-    end process;
-
-
-
-    read_proc:process
-
-        variable linenum : positive :=0;
-        variable text_line : line;
-        variable text_line_cc : line;
-        variable readok : boolean;
-
-        variable vr_posx : std_logic_vector(31 downto 0);
-
-    begin
-
-        while true loop
-            wait until sendfile;
-
-            while not endfile(testinput) loop
-                wait until rising_edge(tb_clk);
-
-                readline(testinput, text_line);
-                linenum := linenum+1;
-                report "Read: "&text_line.all severity note;
-
-                -- Skip empty lines and single-line comments
-                if text_line.all'length = 0 or text_line.all(1) = '#' then
-                    next;
-                end if;
-
-                hread(text_line, vr_posx, readok);
-                assert readok
-                    report "Read 'posx' failed for line: " & integer'image(linenum) severity failure;
-                posx <= vr_posx;
-
-            end loop;
-
-            sendfile <= false;
-            file_close(testinput);
-        end loop;
-
-    end process read_proc;
-
-
-end architecture;