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README.adoc 0 → 100644
View file @ a3197ce4
include::doc/main.adoc[]
doc/images/combpm_packet_filter.svg 0 → 100644
View file @ a3197ce4
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doc/main.adoc
View file @ a3197ce4
......@@ -37,7 +37,43 @@ image::images/overview.svg[]
The module provide additionnal blocs usefull for the application.
* Frame filter
* Packet filter
=== Package
A package describing the AXIS packet at the module output is present.
It helps to automatically pack or unpack the packet (functions _bpmpacket2slv()_ or _slv2bpmpacket()_ ).
A zero packet (_C_BPMPACKET_ZERO) is also declared.
.t_bpmpacket record type
[cols="1,1,1"]
[%autowidth]
|===
|Member name | Type | Description
|pos_x | std_logic_vector(31 downto 0) | X position
|pos_y | std_logic_vector(31 downto 0) | Y position
|bpm_id | std_logic_vector(15 downto 0) | ID of the source BPM
|mc_timestamp | std_logic_vector(39 downto 0) | Timestamp at machine clock frequency
|fa_seq | std_logic_vector(7 downto 0) | FA sequence number, LSB only
|===
.Some usage of pkg_bpmpacket.vhd
[example]
[source,vhdl]
----
signal my_packet : t_bpmpacket;
(...)
my_packet <= slv2bpmpacket(axis_tdata); -- Convert from AXIS tdata to a BPM packet
id <= my_packet.bpm_id; -- Access packet fields
pos_x <= my_packet.pos_x;
axis_tdata_o <= bpmpacket(my_packet); -- Convert back to logic vector for AXIS tdata
----
// ================================================================================
== Details
......@@ -49,15 +85,15 @@ The module provide additionnal blocs usefull for the application.
* DLS CC Sequence number check. If discontinuous: pulse seq_discontinuity output and increase
=== BPM frame AXIS stream
=== BPM packet AXIS stream
The AXIS data provided by the protocol decoder is descibed in the file _pkg_bpmframe_stream.vhd_.
The AXIS data provided by the protocol decoder is descibed in the file _pkg_bpmpacket_stream.vhd_.
See this file to have up to date fields info.
* Frames are not cut into packets (TLAST always '1').
* Packets are not cut into packets (TLAST always '1').
* No FIFO on output (TREADY is not used).
The application needs to either implement FIFO or accepts every frame (AXIS packet).
The frame rate depends on the signal input.
The application needs to either implement FIFO or accepts every packet (AXIS packet).
The packet rate depends on the signal input.
=== Transceivers
......@@ -67,9 +103,24 @@ The TCL script combpm_gtwizard.tcl is used to create the GTWizard IP, wich is in
We use DESYRDL to generate a AXI4L slave decoder.
=== Frame filter
=== Packet filter
This block can drop BPM packets from the AXIS by looking up their BPM_ID field.
A simple memory block is used and programmed via the AXI-MM interface.
The block is adressed by the BPM ID (0 to 255).
The msb (bit 7) gives the forward signal.
If '1' then the packet is transfered, else it is blocked.
*To be completed...*
The 6 lsb (bit 6-0) is filled into the TDEST field of the AXIS stream.
This can be used to further routing.
.Structural schematic of combpm_packet_filter.
image::images/combpm_packet_filter.svg[]
// ================================================================================
== Registers map
include::regmap.adoc[]
// ================================================================================
== TODO/Future of this module
......
doc/regmap.adoc 0 → 100644
View file @ a3197ce4
.Registers
[.tab-addr-reg,cols="5,1,1,2,1,9"]
|===
|Name | N | bits | type | RW | Description
| ID | 1 | 32 | uint | RO | +++Module identifier.+++
| VERSION | 1 | 32 | uint | RO | +++Module version.+++
| SFP | 1 | 2 | bitfields | RO | +++SFP module status+++ +
- RXLOS [0:0] sw:RO uint : +++RX lost signal+++ +
- MODABS [1:1] sw:RO uint : +++Module is absent+++
| GT | 1 | 11 | bitfields | RW | +++GT transceivers status and control+++ +
- POWERGOOD [0:0] sw:RO uint : +++Powergood signal+++ +
- QPLLLOCK [1:1] sw:RO uint : +++PLL lock signal+++ +
- RXCLKACTIVE [2:2] sw:RO uint : +++RX clk active signal+++ +
- RXCDRLOCK [3:3] sw:RO uint : +++RX CDR lock signal+++ +
- RXRESETDONE [4:4] sw:RO uint : +++RX reset done signal+++ +
- RXBYTEISALIGNED [5:5] sw:RO uint : +++RX byte is aligned signal+++ +
- RXBYTEREALIGN [6:6] sw:RO uint : +++RX byte realign signal+++ +
- RXCOMMADET [7:7] sw:RO uint : +++RX comma detected signal+++ +
- RXCOMMADETEN [8:8] sw:RW uint : +++RX comma detection enable signal+++ +
- RXRSTDATAPATH [9:9] sw:RW uint : +++Reset RX datapath+++ +
- RXRSTPLLDATAPATH [10:10] sw:RW uint : +++Reset RX PLL and datapath+++
| PROTOCOL | 1 | 4 | bitfields | RW | +++BPM protocol status and control+++ +
- FRAMEERROR [0:0] sw:RO uint : +++Frame error+++ +
- SEQFRAMECNTERROR [1:1] sw:RO uint : +++Sequence frame count mismatch+++ +
- SEQFRAMEDISCONT [2:2] sw:RO uint : +++Sequence frame discontinuity+++ +
- SOFTRESET [3:3] sw:RW uint : +++Soft reset+++
| VALIDFRAMECNT | 1 | 32 | uint | RO | +++BPM protocol valid frame counters+++
| INVALIDFRAMECNT | 1 | 32 | uint | RO | +++BPM protocol invalid frame counters+++
| VALIDFRAMERATE | 1 | 32 | uint | RO | +++BPM protocol valid frame rate+++
| INVALIDFRAMERATE | 1 | 32 | uint | RO | +++BPM protocol invalid frame rate+++
| FRAMESEQ | 1 | 16 | uint | RO | +++BPM protocol frame sequence+++
|===
hdl/combpm_packet_filter.vhd
View file @ a3197ce4
......@@ -2,7 +2,7 @@ library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.pkg_bpmframe_stream.all;
use work.pkg_bpmpacket_stream.all;
entity combpm_packet_filter is
generic(
......@@ -133,8 +133,8 @@ architecture rtl of combpm_packet_filter is
------------------------
-- SIGNAL DECLARATION --
------------------------
signal in_packet : t_bpmframe;
signal out_packet : t_bpmframe;
signal in_packet : t_bpmpacket;
signal out_packet : t_bpmpacket;
signal bram_clk_a : STD_LOGIC;
signal bram_en_a : STD_LOGIC;
......@@ -161,13 +161,13 @@ begin
p_main: process(axis_clk, axis_rst_n)
begin
if axis_rst_n = '0' then
in_packet <= slv2bpmframe(zero_packet);
out_packet <= slv2bpmframe(zero_packet);
in_packet <= slv2bpmpacket(zero_packet);
out_packet <= slv2bpmpacket(zero_packet);
elsif rising_edge(axis_clk) then
-- Register input packet
if s_axis_tvalid = '1' then
in_packet <= slv2bpmframe(s_axis_tdata);
in_packet <= slv2bpmpacket(s_axis_tdata);
end if;
tvalid_r(tvalid_r'left downto 1) <= tvalid_r(tvalid_r'left-1 downto 0);
......@@ -182,7 +182,7 @@ begin
-- AXIS OUTPUT --
-----------------
m_axis_tdest <= std_logic_vector(resize(unsigned(table_data(6 downto 0)), C_TDEST_W));
m_axis_tdata <= bpmframe2slv(out_packet);
m_axis_tdata <= bpmpacket2slv(out_packet);
m_axis_tlast <= '1'; -- Packet is one tdata only
m_axis_tvalid <= tvalid_r(tvalid_r'left) and table_data(7);
......
hdl/combpm_protocol_electron.vhd
View file @ a3197ce4
......@@ -3,7 +3,7 @@ library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.pkg_bpmframe_stream.all;
use work.pkg_bpmpacket_stream.all;
entity combpm_protocol_electron is
port(
......@@ -17,8 +17,8 @@ entity combpm_protocol_electron is
gt_datarx : in std_logic_vector(15 downto 0); -- Deserialized data.
-- AXIS interface
m_axis_m2s : out t_bpmframe_axis_m2s;
m_axis_s2m : in t_bpmframe_axis_s2m;
m_axis_m2s : out t_bpmpacket_axis_m2s;
m_axis_s2m : in t_bpmpacket_axis_s2m;
-- Status and control interface
soft_reset : in std_logic; -- Reset all counters.
......@@ -82,7 +82,7 @@ architecture rtl of combpm_protocol_electron is
signal rate_valid_r : unsigned(31 downto 0);
signal rate_invalid_r : unsigned(31 downto 0);
signal packet : t_bpmframe;
signal packet : t_bpmpacket;
signal m_axi_tvalid : std_logic;
......@@ -236,7 +236,7 @@ begin
-- AXIS OUT --
--------------
m_axis_m2s.tdest <= (others => '0');
m_axis_m2s.tdata <= bpmframe2slv(packet);
m_axis_m2s.tdata <= bpmpacket2slv(packet);
m_axis_m2s.tlast <= '1'; -- One transfer is One packet.
m_axis_m2s.tvalid <= m_axi_tvalid;
......@@ -244,7 +244,7 @@ begin
p_axis:process(clk, rst_n)
begin
if rst_n = '0' then
packet <= C_BPMFRAME_ZERO;
packet <= C_BPMPACKET_ZERO;
m_axi_tvalid <= '0';
elsif rising_edge(clk) then
......
hdl/pkg_bpmframe_stream.vhd → hdl/pkg_bpmpacket_stream.vhd
View file @ a3197ce4
-- Package BPMFRAME STREAM
-- Package BPMPACKET STREAM
-- this package describe the format of the AXI-Stream interface used by blocs of the module COMBPM.
--
-- The usefull things are :
-- * Two record types for port interfaces: t_bpmframe_axis_m2s and t_bpmframe_axis_s2m.
-- * One record type for frame fields: t_bpmframe.
-- * Two functions to transform TDATA (std_logic_vector) to/from t_bpmframe: slv2bpmframe and bpmframe2slv.
-- * Two record types for port interfaces: t_bpmpacket_axis_m2s and t_bpmpacket_axis_s2m.
-- * One record type for frame fields: t_bpmpacket.
-- * Two functions to transform TDATA (std_logic_vector) to/from t_bpmpacket: slv2bpmpacket and bpmpacket2slv.
library ieee;
use ieee.std_logic_1164.all;
package pkg_bpmframe_stream is
package pkg_bpmpacket_stream is
----------------------
-- MACRO PARAMETERS --
......@@ -19,29 +19,29 @@ package pkg_bpmframe_stream is
---------------------------------
-- AXIS MASTER/SLAVE INTERFACE --
---------------------------------
type t_bpmframe_axis_m2s is record
type t_bpmpacket_axis_m2s is record
tdest : std_logic_vector(C_TDEST_W-1 downto 0);
tdata : std_logic_vector(C_TDATA_W-1 downto 0);
tlast : std_logic;
tvalid : std_logic;
end record t_bpmframe_axis_m2s;
end record t_bpmpacket_axis_m2s;
type t_bpmframe_axis_s2m is record
type t_bpmpacket_axis_s2m is record
tready : std_logic;
end record t_bpmframe_axis_s2m;
end record t_bpmpacket_axis_s2m;
------------------------
-- AXIS STREAM PACKET --
------------------------
type t_bpmframe is record
type t_bpmpacket is record
pos_x : std_logic_vector(31 downto 0);
pos_y : std_logic_vector(31 downto 0);
bpm_id : std_logic_vector(15 downto 0);
mc_timestamp : std_logic_vector(39 downto 0);
fa_seq : std_logic_vector(7 downto 0);
end record t_bpmframe;
end record t_bpmpacket;
constant C_BPMFRAME_ZERO : t_bpmframe := (
constant C_BPMPACKET_ZERO : t_bpmpacket := (
pos_x => (others => '0'),
pos_y => (others => '0'),
bpm_id => (others => '0'),
......@@ -49,27 +49,27 @@ package pkg_bpmframe_stream is
fa_seq => (others => '0')
);
function slv2bpmframe(
function slv2bpmpacket(
signal tdata : std_logic_vector(C_TDATA_W-1 downto 0)
)
return t_bpmframe;
return t_bpmpacket;
function bpmframe2slv(
signal packet : t_bpmframe
function bpmpacket2slv(
signal packet : t_bpmpacket
)
return std_logic_vector;
end package;
package body pkg_bpmframe_stream is
package body pkg_bpmpacket_stream is
function slv2bpmframe(
function slv2bpmpacket(
signal tdata : std_logic_vector(C_TDATA_W-1 downto 0)
)
return t_bpmframe is
variable packet : t_bpmframe;
return t_bpmpacket is
variable packet : t_bpmpacket;
begin
packet.pos_x := tdata(31 downto 0);
packet.pos_y := tdata(63 downto 32);
......@@ -79,8 +79,8 @@ package body pkg_bpmframe_stream is
return packet;
end function;
function bpmframe2slv(
signal packet : t_bpmframe
function bpmpacket2slv(
signal packet : t_bpmpacket
)
return std_logic_vector is
begin
......
hdl/top_combpm_electron.vhd
View file @ a3197ce4
......@@ -13,7 +13,7 @@ library desyrdl;
use desyrdl.common.all;
use desyrdl.pkg_combpm.all;
use work.pkg_bpmframe_stream.all;
use work.pkg_bpmpacket_stream.all;
use work.pkg_combpm_version.all;
entity top_combpm_electron is
......@@ -47,8 +47,8 @@ entity top_combpm_electron is
sfp_tx_fault : in std_logic;
-- AXIS interface
m_axis_m2s : out t_bpmframe_axis_m2s;
m_axis_s2m : in t_bpmframe_axis_s2m; -- warning: TREADY is ignored !
m_axis_m2s : out t_bpmpacket_axis_m2s;
m_axis_s2m : in t_bpmpacket_axis_s2m; -- warning: TREADY is ignored !
-- AXI bus interface
pi_s_top : in t_COMBPM_m2s;
......@@ -198,17 +198,30 @@ begin
);
addrmap_w.VERSION.data.data <= C_VERSION;
addrmap_w.SFP.RXLOS.data(0) <= sfp_rx_los;
addrmap_w.SFP.MODABS.data(0) <= sfp_mod_abs;
addrmap_w.GT.POWERGOOD.data(0) <= gt_powergood;
addrmap_w.GT.QPLLLOCK.data(0) <= qpll_lock;
-- rxclkactive on test
addrmap_w.GT.RXCDRLOCK.data(0) <= gt_rxcdrlock;
addrmap_w.GT.RXRESETDONE.data(0) <= gt_rxresetdone;
addrmap_w.GT.RXBYTEISALIGNED.data(0) <= gt_rxbyteisaligned;
addrmap_w.GT.RXBYTEREALIGN.data(0) <= gt_rxbyterealign;
addrmap_w.GT.RXCOMMADET.data(0) <= gt_rxcommadet;
addrmap_w.ID.data.data <= x"507E1710";
addrmap_w.VERSION.data.data <= C_VERSION;
addrmap_w.SFP.RXLOS.data(0) <= sfp_rx_los;
addrmap_w.SFP.MODABS.data(0) <= sfp_mod_abs;
addrmap_w.GT.POWERGOOD.data(0) <= gt_powergood;
addrmap_w.GT.QPLLLOCK.data(0) <= qpll_lock;
addrmap_w.GT.RXCDRLOCK.data(0) <= gt_rxcdrlock;
addrmap_w.GT.RXRESETDONE.data(0) <= gt_rxresetdone;
addrmap_w.GT.RXBYTEISALIGNED.data(0) <= gt_rxbyteisaligned;
addrmap_w.GT.RXBYTEREALIGN.data(0) <= gt_rxbyterealign;
addrmap_w.GT.RXCOMMADET.data(0) <= gt_rxcommadet;
addrmap_w.PROTOCOL.FRAMEERROR.data(0) <= frame_error;
addrmap_w.PROTOCOL.SEQFRAMECNTERROR.data(0) <= cnt_seq_mismatch;
addrmap_w.PROTOCOL.SEQFRAMEDISCONT.data(0) <= seq_discontinuity;
addrmap_w.VALIDFRAMECNT.data.data <= frame_valid_cnt;
addrmap_w.INVALIDFRAMECNT.data.data <= frame_invalid_cnt;
addrmap_w.VALIDFRAMERATE.data.data <= frame_valid_rate;
addrmap_w.INVALIDFRAMERATE.data.data <= frame_invalid_rate;
addrmap_w.FRAMESEQ.data.data <= frame_seq_cnt;
end block blk_desyrdl;
--------------------------------------
......
rdl/combpm.rdl
View file @ a3197ce4
......@@ -8,166 +8,105 @@ addrmap combpm {
name="BPM protocol decoder controller";
reg {
field {
hw=w;sw=r;
} data[32];
desc="Module identifier.";
field {hw=w;sw=r;} data[32];
} ID;
reg {
desc="Module version.";
field {hw=w;sw=r;} data[32];
} VERSION;
reg {
name="SFP status and control";
desc="SFP module status";
desyrdl_data_type="bitfields";
field {
desc="SFP RX lost signal";
hw=w;
sw=r;
field {desc="RX lost signal";hw=w;sw=r;
} RXLOS;
field {
desc="SFP module absent signal";
hw=w;
sw=r;
field {desc="Module is absent";hw=w;sw=r;
} MODABS;
} SFP;
reg {
name="GT status and control";
desc="GT transceivers status and control";
desyrdl_data_type="bitfields";
field {
desc="Powergood signal";
hw=w;
sw=r;
field {desc="Powergood signal";hw=w;sw=r;
} POWERGOOD;
field {
desc="PLL lock signal";
hw=w;
sw=r;
field {desc="PLL lock signal";hw=w;sw=r;
} QPLLLOCK;
field {
desc="RX clk active signal";
hw=w;
sw=r;
field {desc="RX clk active signal";hw=w;sw=r;
} RXCLKACTIVE;
field {
desc="RX CDR lock signal";
hw=w;
sw=r;
field {desc="RX CDR lock signal";hw=w;sw=r;
} RXCDRLOCK;
field {
desc="RX reset done signal";
hw=w;
sw=r;
field {desc="RX reset done signal";hw=w;sw=r;
} RXRESETDONE;
field {
desc="RX byte is aligned signal";
hw=w;
sw=r;
field {desc="RX byte is aligned signal";hw=w;sw=r;
} RXBYTEISALIGNED;
field {
desc="RX byte realign signal";
hw=w;
sw=r;
field {desc="RX byte realign signal";hw=w;sw=r;
} RXBYTEREALIGN;
field {
desc="RX comma detected signal";
hw=w;
sw=r;
field {desc="RX comma detected signal";hw=w;sw=r;
} RXCOMMADET;
field {
desc="RX comma detection enable signal";
hw=r;
sw=rw;
field {desc="RX comma detection enable signal";hw=r;sw=rw;
} RXCOMMADETEN = 1;
field {
desc="Reset RX datapath";
hw=r;
sw=rw;
field {desc="Reset RX datapath";hw=r;sw=rw;
} RXRSTDATAPATH = 1;
field {
desc="Reset RX PLL and datapath";
hw=r;
sw=rw;
field {desc="Reset RX PLL and datapath";hw=r;sw=rw;
} RXRSTPLLDATAPATH = 1;
} GT;
reg {
name="Protocol status and control";
desc="BPM protocol status and control";
desyrdl_data_type="bitfields";
field {
desc="Frame error";
hw=w;sw=r;
field {desc="Frame error";hw=w;sw=r;
} FRAMEERROR;
field {
desc="Sequence frame count mismatch";
hw=w;sw=r;
field {desc="Sequence frame count mismatch";hw=w;sw=r;
} SEQFRAMECNTERROR;
field {
desc="Sequence frame discontinuity";
hw=w;sw=r;
field {desc="Sequence frame discontinuity";hw=w;sw=r;
} SEQFRAMEDISCONT;
field {
desc="Soft reset";
hw=r;sw=rw;
field {desc="Soft reset";hw=r;sw=rw;
} SOFTRESET;
} PROTOCOL;
reg {
name="Protocol frame counters";
field {
desc="Valid frame counter";
hw=w;sw=r;
} CNT[32];
desc="BPM protocol valid frame counters";
field {hw=w;sw=r;} data[32];
} VALIDFRAMECNT;
reg {
field {
desc="Invalid frame counter";
hw=w;sw=r;
} CNT[32];
desc="BPM protocol invalid frame counters";
field {hw=w;sw=r;} data[32];
} INVALIDFRAMECNT;
reg {
name="Protocol frame rate";
field {
desc="Valid frame rate";
hw=w;sw=r;
} RATE[32];
desc="BPM protocol valid frame rate";
field {hw=w;sw=r;} data[32];
} VALIDFRAMERATE;
reg {
field {
desc="Invalid frame rate";
hw=w;sw=r;
} RATE[32];
desc="BPM protocol invalid frame rate";
field {hw=w;sw=r;} data[32];
} INVALIDFRAMERATE;
reg {
name="Protocol frame sequence";
field {
desc="Number of frames in sequence";
hw=w;sw=r;
} FRAMECNT[16];
desc="BPM protocol frame sequence";
field {hw=w;sw=r;} data[16];
} FRAMESEQ;
};
tcl/main.tcl
View file @ a3197ce4
......@@ -21,7 +21,7 @@ proc setSources {} {
lappend Vhdl ../hdl/pkg_combpm_version.vhd
lappend Vhdl ../hdl/combpm_protocol_electron.vhd
lappend Vhdl ../hdl/top_combpm_electron.vhd
lappend Vhdl ../hdl/pkg_bpmframe_stream.vhd
lappend Vhdl ../hdl/pkg_bpmpacket_stream.vhd
lappend Vhdl ../hdl/combpm_packet_filter.vhd
}
......

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