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Commit 93d917ad authored by BRONES Romain's avatar BRONES Romain
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fix:Remove unused TREADY and TLAST from AXIS

parent d4c7e5a3
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...@@ -19,14 +19,11 @@ entity combpm_packet_filter is ...@@ -19,14 +19,11 @@ entity combpm_packet_filter is
-- AXIS SLAVE INTERFACE -- AXIS SLAVE INTERFACE
s_axis_tdest : in std_logic_vector(C_TDEST_W-1 downto 0); s_axis_tdest : in std_logic_vector(C_TDEST_W-1 downto 0);
s_axis_tdata : in std_logic_vector(C_TDATA_W-1 downto 0); s_axis_tdata : in std_logic_vector(C_TDATA_W-1 downto 0);
s_axis_tlast : in std_logic;
s_axis_tvalid : in std_logic; s_axis_tvalid : in std_logic;
s_axis_tready : out std_logic;
-- AXIS MASTER INTERFACE -- AXIS MASTER INTERFACE
m_axis_tdest : out std_logic_vector(C_TDEST_W-1 downto 0); m_axis_tdest : out std_logic_vector(C_TDEST_W-1 downto 0);
m_axis_tdata : out std_logic_vector(C_TDATA_W-1 downto 0); m_axis_tdata : out std_logic_vector(C_TDATA_W-1 downto 0);
m_axis_tlast : out std_logic;
m_axis_tvalid : out std_logic; m_axis_tvalid : out std_logic;
-- Table configuration interface -- Table configuration interface
...@@ -57,9 +54,6 @@ begin ...@@ -57,9 +54,6 @@ begin
zero_packet <= (others => '0'); zero_packet <= (others => '0');
-- always ready
s_axis_tready <= '1';
---------------------- ----------------------
-- STREAM REGISTERS -- -- STREAM REGISTERS --
---------------------- ----------------------
...@@ -88,7 +82,6 @@ begin ...@@ -88,7 +82,6 @@ begin
----------------- -----------------
m_axis_tdest <= std_logic_vector(resize(unsigned(table_data(6 downto 0)), C_TDEST_W)); m_axis_tdest <= std_logic_vector(resize(unsigned(table_data(6 downto 0)), C_TDEST_W));
m_axis_tdata <= bpmpacket2slv(out_packet); m_axis_tdata <= bpmpacket2slv(out_packet);
m_axis_tlast <= '1'; -- Packet is one tdata only
m_axis_tvalid <= tvalid_r(tvalid_r'left) and table_data(7); m_axis_tvalid <= tvalid_r(tvalid_r'left) and table_data(7);
------------------ ------------------
......
...@@ -50,8 +50,7 @@ entity top_combpm_electron is ...@@ -50,8 +50,7 @@ entity top_combpm_electron is
m_axis_aclk : out std_logic; m_axis_aclk : out std_logic;
m_axis_tdata : out std_logic_vector(C_TDATA_W-1 downto 0); m_axis_tdata : out std_logic_vector(C_TDATA_W-1 downto 0);
m_axis_tdest : out std_logic_vector(C_TDEST_W-1 downto 0); m_axis_tdest : out std_logic_vector(C_TDEST_W-1 downto 0);
m_axis_tlast : out std_logic; m_axis_tvalid : out std_logic;
m_axis_tready : in std_logic;
-- AXI bus interface -- AXI bus interface
s_axi_aclk : in std_logic; s_axi_aclk : in std_logic;
...@@ -344,14 +343,11 @@ begin ...@@ -344,14 +343,11 @@ begin
-- AXIS SLAVE INTERFACE -- AXIS SLAVE INTERFACE
s_axis_tdest => m_axis_decoded_m2s.tdest, s_axis_tdest => m_axis_decoded_m2s.tdest,
s_axis_tdata => m_axis_decoded_m2s.tdata, s_axis_tdata => m_axis_decoded_m2s.tdata,
s_axis_tlast => m_axis_decoded_m2s.tlast,
s_axis_tvalid => m_axis_decoded_m2s.tvalid, s_axis_tvalid => m_axis_decoded_m2s.tvalid,
s_axis_tready => m_axis_decoded_s2m.tready,
-- AXIS SLAVE INTERFACE -- AXIS SLAVE INTERFACE
m_axis_tdest => m_axis_tdest, m_axis_tdest => m_axis_tdest,
m_axis_tdata => m_axis_tdata, m_axis_tdata => m_axis_tdata,
m_axis_tlast => m_axis_tlast,
m_axis_tvalid => m_axis_tvalid, m_axis_tvalid => m_axis_tvalid,
-- Table configuration interface -- Table configuration interface
......
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