use work.pkg_corr_matrixpi_version.all;

architecture basic of TestCtrl is


    ------------------------
    -- SIGNAL DECLARATION --
    ------------------------
    signal ConfigDone : integer_barrier := 1 ;
    signal TestDone : integer_barrier := 1 ;

    --------------------------
    -- FUNCTION DECLARATION --
    --------------------------
    function f_addr(addr:natural) return std_logic_vector is
    begin
        return std_logic_vector(to_unsigned(addr, AXI_ADDR_WIDTH));
    end function;

    function f_sdata(data:integer) return std_logic_vector is
    begin
        return std_logic_vector(to_signed(data, AXI_DATA_WIDTH));
    end function;

    function f_data(data:natural) return std_logic_vector is
    begin
        return std_logic_vector(to_unsigned(data, AXI_DATA_WIDTH));
    end function;

    function f_bpmpkt(id:natural; x:integer; y:integer) return std_logic_vector is
    begin
        return std_logic_vector(to_unsigned(id, C_W_BPMID)) & std_logic_vector(to_signed(x, C_W_BPMPOS)) & std_logic_vector(to_signed(y, C_W_BPMPOS));
    end function;


begin

    ------------------------------------------------------------
    -- ControlProc
    --   Set up AlertLog and wait for end of test
    ------------------------------------------------------------
    ControlProc : process
    begin
        -- Initialization of test
        SetAlertLogName("BasicTest");
        SetLogEnable(PASSED, TRUE);    -- Enable PASSED logs
        SetLogEnable(INFO, TRUE);    -- Enable INFO logs

        -- Wait for testbench initialization
        wait for 0 ns ;  wait for 0 ns;
        TranscriptOpen(OSVVM_RESULTS_DIR & "BasicTestTr.txt");
        SetTranscriptMirror(TRUE);

        -- Wait for Design Reset
        wait until nReset = '1';
        ClearAlerts;

        -- Wait for test to finish
        WaitForBarrier(TestDone, 35 ms);
        AlertIf(now >= 35 ms, "Test finished due to timeout");
        AlertIf(GetAffirmCount < 1, "Test is not Self-Checking");


        TranscriptClose;
        EndOfTestReports;
        std.env.stop;
        wait;
    end process ControlProc;


    ------------------------------------------------------------
    -- ManagerProc
    --   Generate transactions for AxiManager
    ------------------------------------------------------------
    ManagerProc : process
        variable Data : std_logic_vector(AXI_DATA_WIDTH-1 downto 0) ;
    begin
        wait until nReset = '1';
        WaitForClock(ManagerRec, 2);

        log("Read version", INFO) ;
        Read(ManagerRec, f_addr(4), Data) ;
        AffirmIfEqual(Data, C_VERSION, "Manager Read Data: ") ;

        log("==--- Configure the DUT ---==", INFO);
        log("+-- Global Config", INFO);
        -- Correction coefficients
        Write(ManagerRec, f_addr(12), f_data(16#0000E641#));
        Write(ManagerRec, f_addr(16), f_data(16#000083B2#));

        -- Enable
        Write(ManagerRec, f_addr(8), f_sdata(5));

        -- Set all orbit reference to 0
        for I in 0 to C_N_MM_BPM-1 loop
            --Write(ManagerRec, f_addr(16#400#+I*4), f_sdata(0));
            --Write(ManagerRec, f_addr(16#800#+I*4), f_sdata(0));
        end loop;

        -- Set Matrix Coefs, diagonal
        for I in 0 to C_N_MM_BPM-1 loop
            for J in 0 to C_N_MM_PSC-1 loop
                if I = J then
                    Write(ManagerRec, f_addr(16#E00#+I*512+J*4), f_sdata(32768));
                else
                    --Write(ManagerRec, f_addr(16#E00#+I*512+J*4), f_sdata(0));
                end if;
            end loop;
        end loop;

        WaitForBarrier(ConfigDone);

        -- Global Enable
        WaitForClock(ManagerRec, 10) ;
        --Write(ManagerRec, std_logic_vector(C_REGISTER_INFO(C_CONFIG_ID).address), X"00000001") ;

        wait ;
    end process ManagerProc ;

    ------------------------------------------------------------
    -- AxiTransmitterProc
    --   Generate transactions for AxiTransmitter
    ------------------------------------------------------------
    TransmitterProc : process
        variable Data : std_logic_vector(DATA_TX_WIDTH-1 downto 0);
        variable OffSet : integer ;
        variable TransactionCount : integer;
        variable ErrorCount : integer;
        variable CurTime : time ;
        variable TxAlertLogID : AlertLogIDType ;

    begin
        wait until nReset = '1' ;
        WaitForClock(StreamTxRec, 2) ;

        WaitForBarrier(ConfigDone) ;

        log("Sending bpm packets", INFO);
        for NTURN in 0 to 3 loop
            for I in 3 to 124 loop
                Send(StreamTxRec, f_bpmpkt(I, -457874+3833*I, 125679-81098*I), std_logic_vector(to_unsigned(NTURN,8)&'0'));
            end loop;

            -- Simulate interpacket delay
            WaitForClock(StreamTxRec, 150) ;
        end loop;

        WaitForBarrier(TestDone) ;
        wait ;
    end process TransmitterProc ;


end basic;

Configuration tc_basic of tb_corr_matrixpi is
  for TestHarness
    for TestCtrl_1 : TestCtrl
      use entity work.TestCtrl(basic);
    end for;
  end for;
end tc_basic;