diff --git a/hdl/data_serializer.vhd b/hdl/data_serializer.vhd index 91b80f1121b1dab5f80558a913e7cf43abf63101..b3f4924d7bf26b3245d6984a398e203741826675 100644 --- a/hdl/data_serializer.vhd +++ b/hdl/data_serializer.vhd @@ -42,7 +42,7 @@ architecture rtl of data_serializer is ------------------------ -- SIGNAL DECLARATION -- ------------------------ - signal cnt : unsigned(pscid_table_i.addr'length-1 downto 0); + signal cnt : unsigned(C_W_SER_CNT-1 downto 0); signal run_serial : std_logic; signal pscid : std_logic_vector(C_W_PSCID-1 downto 0); @@ -118,14 +118,14 @@ begin -- Port A is read write from AXI controller, Port B is read only from logic inst_refx_table: entity desy.ram_tdp generic map( - G_ADDR => pscid_table_i.addr'length, + G_ADDR => C_W_SER_CNT, G_DATA => C_W_PSCID ) port map( pi_clk_a => clk, pi_en_a => pscid_table_i.en, pi_we_a => pscid_table_i.we, - pi_addr_a => pscid_table_i.addr, + pi_addr_a => pscid_table_i.addr(C_W_SER_CNT-1 downto 0), pi_data_a => pscid_table_i.data, po_data_a => pscid_table_o.data, pi_clk_b => clk, diff --git a/hdl/matrix_mul.vhd b/hdl/matrix_mul.vhd index 0f8a665f55d63e69414f83fae2bf1eb7943ab2dd..47f2076d85dd9ede867bac33ae90fda4cd401034 100644 --- a/hdl/matrix_mul.vhd +++ b/hdl/matrix_mul.vhd @@ -118,7 +118,7 @@ begin -- MATRIX MULTIPLICATION -- --------------------------- -- Generate matrix line multiplication, two planes by loop iteration - G_MATRIX:for I in 0 to C_N_MM_PSC/2 generate + G_MATRIX:for I in 0 to C_N_MM_PSC/2-1 generate signal mult_x : signed(C_W_MM_MULT-1 downto 0); signal mult_y : signed(C_W_MM_MULT-1 downto 0); signal accu_x : signed(C_W_MM_ACCU-1 downto 0); @@ -140,7 +140,7 @@ begin pi_clk_a => clk, pi_en_a => mm_coef_i(2*I).en, pi_we_a => mm_coef_i(2*I).we, - pi_addr_a => mm_coef_i(2*I).addr, + pi_addr_a => mm_coef_i(2*I).addr(C_W_MM_IDCNT-1 downto 0), pi_data_a => mm_coef_i(2*I).data, po_data_a => mm_coef_o(2*I).data, pi_clk_b => clk, @@ -160,7 +160,7 @@ begin pi_clk_a => clk, pi_en_a => mm_coef_i(2*I+1).en, pi_we_a => mm_coef_i(2*I+1).we, - pi_addr_a => mm_coef_i(2*I+1).addr, + pi_addr_a => mm_coef_i(2*I+1).addr(C_W_MM_IDCNT-1 downto 0), pi_data_a => mm_coef_i(2*I+1).data, po_data_a => mm_coef_o(2*I+1).data, pi_clk_b => clk, diff --git a/hdl/orbit_error.vhd b/hdl/orbit_error.vhd index 6d82b6d6cce53e28ff55b1e7f173c7e445476742..d61278276f9d8e4ef8cb8077a05e4cc0e854d9ac 100644 --- a/hdl/orbit_error.vhd +++ b/hdl/orbit_error.vhd @@ -76,7 +76,7 @@ begin pi_clk_a => clk, pi_en_a => reforbitx_i.en, pi_we_a => reforbitx_i.we, - pi_addr_a => reforbitx_i.addr, + pi_addr_a => reforbitx_i.addr(C_W_BPMID-1 downto 0), pi_data_a => reforbitx_i.data, po_data_a => reforbitx_o.data, pi_clk_b => clk, @@ -96,7 +96,7 @@ begin pi_clk_a => clk, pi_en_a => reforbity_i.en, pi_we_a => reforbity_i.we, - pi_addr_a => reforbity_i.addr, + pi_addr_a => reforbity_i.addr(C_W_BPMID-1 downto 0), pi_data_a => reforbity_i.data, po_data_a => reforbity_o.data, pi_clk_b => clk, diff --git a/hdl/pkg_corrmatrixpi.vhd b/hdl/pkg_corrmatrixpi.vhd index 44388e68befd3cbac28945b006aa084ad2799b25..79988bfc32f9e863f30becaf8706aa7e9feca52e 100644 --- a/hdl/pkg_corrmatrixpi.vhd +++ b/hdl/pkg_corrmatrixpi.vhd @@ -52,6 +52,9 @@ package pkg_corr_matrixpi is constant C_W_COR : natural := 16; -- C_W_COR_SUM-C_N_COR_SAT-C_N_COR_RND + -- Serializer + constant C_W_SER_CNT : natural := 7; -- natural(ceil(log2(real(C_N_MM_PSC)))); + ---------------------- -- TYPE DECLARATION -- ---------------------- diff --git a/rdl/corr_matrixpi.rdl b/rdl/corr_matrixpi.rdl index 351efe41fa587c41b606a9533db383f283ff0df5..67803fb1ec59e261187bedf8a6d923820ecdc2fa 100644 --- a/rdl/corr_matrixpi.rdl +++ b/rdl/corr_matrixpi.rdl @@ -51,13 +51,13 @@ addrmap corr_matrixpi { mem { desc = "X Reference orbit."; memwidth = `C_W_BPMPOS; - mementries = `C_N_MM_BPM; + mementries = 2**`C_W_BPMID-1; } external REFORBITX; mem { desc = "Y Reference orbit."; memwidth = `C_W_BPMPOS; - mementries = `C_N_MM_BPM; + mementries = 2**`C_W_BPMID-1; } external REFORBITY; mem {