From 9f2c03ffe4b212b7c9ffec61064332fdfd2e3a7a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Romain=20Bron=C3=A8s?= <romain.brones@synchrotron-soleil.fr>
Date: Thu, 11 Jul 2024 15:38:10 +0200
Subject: [PATCH] fix code
* fix writting mistakes
* add a non-rounded output for chaining
* use that non rounded output as input of second filter
---
hdl/corr_iir.vhd | 32 +++++++++++++++++++-------------
hdl/top_corr_matrix.vhd | 6 ++++--
tcl/main.tcl | 2 +-
3 files changed, 24 insertions(+), 16 deletions(-)
diff --git a/hdl/corr_iir.vhd b/hdl/corr_iir.vhd
index 4981a40..e98a5a7 100644
--- a/hdl/corr_iir.vhd
+++ b/hdl/corr_iir.vhd
@@ -33,12 +33,13 @@ entity corr_iir is
corrout_valid : out std_logic;
corrout_seq : out std_logic_vector(C_W_BPMSEQ-1 downto 0);
- corrout : out signed_array(0 to C_N_MM_PSC-1)(C_W_COR-1 downto 0)
+ corrout : out signed_array(0 to C_N_MM_PSC-1)(C_W_COR-1 downto 0);
+ corrout_fp : out signed_array(0 to C_N_MM_PSC-1)(C_W_COR+C_W_FP-1 downto 0)
);
-end entity corr_ll;
+end entity corr_iir;
-architecture rtl of corr_ll is
+architecture rtl of corr_iir is
constant C_DELAY : natural := 6;
@@ -89,6 +90,7 @@ begin
signal sumsat_abd : signed(C_W_MM-1 downto 0);
signal reg_dout : signed(C_W_CORFP-1 downto 0);
+ signal reg_dout2 : signed(C_W_CORFP-1 downto 0);
signal reg_din : signed(C_W_MM-1 downto 0);
signal rnd_cor : signed(C_W_COR-1 downto 0);
@@ -135,7 +137,8 @@ begin
sumsat_abd <= (others => '0');
reg_din <= (others => '0');
reg_dout <= (others => '0');
- sat_cor <= (others => '0');
+ reg_dout2 <= (others => '0');
+ rnd_cor <= (others => '0');
rndsat_mult_a <= (others => '0');
rndsat_mult_b <= (others => '0');
rndsat_mult_d <= (others => '0');
@@ -155,13 +158,13 @@ begin
-- Round then sat
if mult_c(C_W_COR_COEFFP-1) = '0' then
- reg_out <= f_resize_sat(
- f_resize_lsb(mult_c, mult_c'length-C_W_COR_COEFFP),
- C_W_CORFP);
+ reg_dout <= f_resize_sat(
+ f_resize_lsb(mult_c, mult_c'length-C_W_COR_COEFFP),
+ C_W_CORFP);
else
- reg_out <= f_resize_sat(
- f_sum_sat(f_resize_lsb(mult_c, mult_c'length-C_W_COR_COEFFP), to_signed(1,2)),
- C_W_CORFP);
+ reg_dout <= f_resize_sat(
+ f_sum_sat(f_resize_lsb(mult_c, mult_c'length-C_W_COR_COEFFP), to_signed(1,2)),
+ C_W_CORFP);
end if;
end if;
end if;
@@ -213,17 +216,20 @@ begin
----------------------------------------------------------------------------------------------------------
-- Output rounding
if reg_dout(C_W_FP-1) = '0' then
- sat_cor <= f_resize_lsb(reg_dout, C_W_COR);
+ rnd_cor <= f_resize_lsb(reg_dout, C_W_COR);
else
- sat_cor <= f_sum_sat(f_resize_lsb(reg_dout, C_W_COR), to_signed(1,2));
+ rnd_cor <= f_sum_sat(f_resize_lsb(reg_dout, C_W_COR), to_signed(1,2));
end if;
+ reg_dout2 <= reg_dout;
+
end if;
end process;
-- mapping
- corrout(I) <= sat_cor;
+ corrout(I) <= rnd_cor;
+ corrout_fp(I) <= reg_dout2;
end generate gen_corr;
diff --git a/hdl/top_corr_matrix.vhd b/hdl/top_corr_matrix.vhd
index ea02fae..5f3747f 100644
--- a/hdl/top_corr_matrix.vhd
+++ b/hdl/top_corr_matrix.vhd
@@ -62,7 +62,7 @@ architecture struct of top_corr_matrix is
-- Corrector result, parallel
signal corrfirst_valid : std_logic;
signal corrfirst_seq : std_logic_vector(C_W_BPMSEQ-1 downto 0);
- signal corrfirst : signed_array(0 to C_N_MM_PSC-1)(C_W_COR-1 downto 0);
+ signal corrfirst : signed_array(0 to C_N_MM_PSC-1)(C_W_COR+C_W_FP-1 downto 0);
signal corrfirst_resize: signed_array(0 to C_N_MM_PSC-1)(C_W_MM-1 downto 0);
signal corrout_valid : std_logic;
signal corrout_seq : std_logic_vector(C_W_BPMSEQ-1 downto 0);
@@ -253,7 +253,8 @@ begin
-- Corr output
corrout_valid => corrfirst_valid,
corrout_seq => corrfirst_seq,
- corrout => corrfirst
+ corrout_fp => corrfirst,
+ corrout => open
);
gen_resize:for I in 0 to C_N_MM_PSC-1 generate
@@ -288,6 +289,7 @@ begin
-- Corr output
corrout_valid => corrout_valid,
corrout_seq => corrout_seq,
+ corrout_fp => open,
corrout => corrout
);
diff --git a/tcl/main.tcl b/tcl/main.tcl
index 5adc12e..078a9cd 100644
--- a/tcl/main.tcl
+++ b/tcl/main.tcl
@@ -19,7 +19,7 @@ proc setSources {} {
lappend Sources {"../hdl/pkg_corr_matrix_version.vhd" "VHDL"}
lappend Sources {"../hdl/pkg_corrmatrix.vhd" "VHDL 2008"}
- lappend Sources {"../hdl/corr_ll.vhd" "VHDL 2008"}
+ lappend Sources {"../hdl/corr_iir.vhd" "VHDL 2008"}
lappend Sources {"../hdl/lvl_threshold.vhd" "VHDL 2008"}
lappend Sources {"../hdl/matrix_mul.vhd" "VHDL 2008"}
lappend Sources {"../hdl/orbit_error.vhd" "VHDL 2008"}
--
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