From 8a1df32b2a3016c6c3294b4b6d98f1ad30dfe4c4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Romain=20Bron=C3=A8s?= <romain.brones@synchrotron-soleil.fr>
Date: Wed, 29 May 2024 08:46:37 +0200
Subject: [PATCH] feat: Add a rate counter on matrix multiplication

* for debug purpose
---
 hdl/matrix_mul.vhd      | 30 +++++++++++++++++++++++++++++-
 hdl/top_corr_matrix.vhd |  5 +++++
 rdl/corr_matrix.rdl     |  5 +++++
 3 files changed, 39 insertions(+), 1 deletion(-)

diff --git a/hdl/matrix_mul.vhd b/hdl/matrix_mul.vhd
index 4c890fb..98935f3 100644
--- a/hdl/matrix_mul.vhd
+++ b/hdl/matrix_mul.vhd
@@ -29,6 +29,10 @@ entity matrix_mul is
         pos_seq                : in std_logic_vector(C_W_BPMSEQ-1 downto 0);
         pos_tvalid             : in std_logic;
 
+        -- status
+        mult_rate              : out std_logic_vector(15 downto 0);
+        pps                    : in std_logic;
+
         -- Data out
         matmult                : out signed_array(0 to C_N_MM_PSC-1)(C_W_MM-1 downto 0);
         matmult_tvalid         : out std_logic;
@@ -60,9 +64,33 @@ architecture rtl of matrix_mul is
     signal mul_done : std_logic;
     signal r_mul_done : std_logic;
 
-begin
+    signal mul_cnt      : unsigned(15 downto 0);
+    signal r_mul_cnt    : std_logic_vector(15 downto 0);
+    signal pps_r        : std_logic;
 
+begin
 
+    -----------------------
+    -- MULT RATE COUNTER --
+    -----------------------
+    p_mult_rate:process(clk, rst_n)
+    begin
+        if rst_n = '0' then
+            r_mul_cnt   <= (others => '0');
+            mul_cnt     <= (others => '0');
+            pps_r       <= '0';
+        elsif rising_edge(clk) then
+            pps_r   <= pps;
+            if pps = '1' and pps_r = '0' then
+                r_mul_cnt   <= std_logic_vector(mul_cnt);
+                mul_cnt     <= (others => '0');
+            else
+                if mul_done = '1' then
+                    mul_cnt <= mul_cnt +1;
+                end if;
+            end if;
+        end if;
+    end process;
 
     ---------------------
     -- DELAY REGISTERS --
diff --git a/hdl/top_corr_matrix.vhd b/hdl/top_corr_matrix.vhd
index 365b5c5..b3a40d4 100644
--- a/hdl/top_corr_matrix.vhd
+++ b/hdl/top_corr_matrix.vhd
@@ -13,6 +13,8 @@ entity top_corr_matrix is
         clk            : in std_logic;
         rst_n          : in std_logic;
 
+        pps            : in std_logic;
+
         -- AXI-MM interface
         s_axi_m2s      : in t_corr_matrix_m2s;
         s_axi_s2m      : out t_corr_matrix_s2m;
@@ -211,6 +213,9 @@ begin
         pos_seq                => errbpm_seq,
         pos_tvalid             => errbpm_tvalid,
 
+        pps                    => pps,
+        mult_rate              => mm_l2a.MULT_RATE.data.data,
+
         -- Data out
         matmult                => matmult,
         matmult_tvalid         => matmult_tvalid,
diff --git a/rdl/corr_matrix.rdl b/rdl/corr_matrix.rdl
index 84e53d7..88d515d 100644
--- a/rdl/corr_matrix.rdl
+++ b/rdl/corr_matrix.rdl
@@ -157,6 +157,11 @@ addrmap corr_matrix {
         field {sw = rw; hw = r;} data[`C_W_MM_IDCNT] = `C_N_MM_BPM;
     } MM_ID_CNT;
 
+    reg {
+        desc="Number of matric multiplication per seconds.";
+        field { sw=r; hw=w; } data[16];
+    } MULT_RATE;
+
     mem {
         desc = "X Reference orbit.";
         desyrdl_data_type="int32";
-- 
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