-- PROJECT FOFB
-- COMBPM ELECTRON TOP LEVEL
-- RBR
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity top_combpm_electron is
port(
clk : in std_logic;
rst_n : in std_logic;
-- GT interface
gt_datarx : in std_logic_vector(15 downto 0);
gt_datatx : out std_logic_vector(15 downto 0);
gt_powergood : in std_logic;
gt_qplllock : in std_logic;
gt_txclkactive : in std_logic;
gt_rxclkactive : in std_logic;
gt_txresetdone : in std_logic;
gt_rxresetdone : in std_logic;
gt_rxcdrlock : in std_logic;
gt_rxbyteisaligned : in std_logic;
gt_rxbyterealign : in std_logic;
gt_rxcommadet : in std_logic;
gt_txfault : in std_logic;
gt_rxlos : in std_logic;
gt_modabs : in std_logic;
gt_rstall : out std_logic;
gt_rxcommadeten : out std_logic;
gt_txdisable : out std_logic;
-- AXIS interface
m_axi_tid : out std_logic_vector(0 downto 0);
m_axi_tdest : out std_logic_vector(9 downto 0);
m_axi_tdata : out std_logic_vector(127 downto 0);
m_axi_tstrb : out std_logic_vector(15 downto 0);
m_axi_tkeep : out std_logic_vector(15 downto 0);
m_axi_tlast : out std_logic;
m_axi_tuser : out std_logic_vector(0 downto 0);
m_axi_tvalid : out std_logic;
m_axi_tready : in std_logic;
-- AXI bus interface
S_AXI_AWADDR : in std_logic_vector(7 downto 0);
S_AXI_AWPROT : in std_logic_vector(2 downto 0);
S_AXI_AWVALID : in std_logic;
S_AXI_AWREADY : out std_logic;
S_AXI_WDATA : in std_logic_vector(32-1 downto 0);
S_AXI_WSTRB : in std_logic_vector(32/8-1 downto 0);
S_AXI_WVALID : in std_logic;
S_AXI_WREADY : out std_logic;
S_AXI_BRESP : out std_logic_vector(1 downto 0);
S_AXI_BVALID : out std_logic;
S_AXI_BREADY : in std_logic;
S_AXI_ARADDR : in std_logic_vector(7 downto 0);
S_AXI_ARPROT : in std_logic_vector(2 downto 0);
S_AXI_ARVALID : in std_logic;
S_AXI_ARREADY : out std_logic;
S_AXI_RDATA : out std_logic_vector(32-1 downto 0);
S_AXI_RRESP : out std_logic_vector(1 downto 0);
S_AXI_RVALID : out std_logic;
S_AXI_RREADY : in std_logic
);
end top_combpm_electron;
architecture struct of top_combpm_electron is
--------------------------
-- INTERFACE ATTRIBUTES --
--------------------------
ATTRIBUTE X_INTERFACE_INFO : STRING;
ATTRIBUTE X_INTERFACE_PARAMETER : STRING;
ATTRIBUTE X_INTERFACE_INFO of m_axi_tid : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TID";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tdest : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TDEST";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tdata : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TDATA";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tstrb : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TSTRB";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tkeep : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TKEEP";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tlast : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TLAST";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tuser : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TUSER";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tvalid : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TVALID";
ATTRIBUTE X_INTERFACE_INFO of m_axi_tready : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TREADY";
ATTRIBUTE X_INTERFACE_INFO of gt_datarx : SIGNAL is "soleil:user:gtsfp:1.0 GT datarx";
ATTRIBUTE X_INTERFACE_INFO of gt_datatx : SIGNAL is "soleil:user:gtsfp:1.0 GT datatx";
ATTRIBUTE X_INTERFACE_INFO of gt_powergood : SIGNAL is "soleil:user:gtsfp:1.0 GT powergood";
ATTRIBUTE X_INTERFACE_INFO of gt_qplllock : SIGNAL is "soleil:user:gtsfp:1.0 GT qplllock";
ATTRIBUTE X_INTERFACE_INFO of gt_txclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT txclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt_rxclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT rxclkactive";
ATTRIBUTE X_INTERFACE_INFO of gt_txresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT txresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt_rxresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT rxresetdone";
ATTRIBUTE X_INTERFACE_INFO of gt_rxcdrlock : SIGNAL is "soleil:user:gtsfp:1.0 GT rxcdrlock";
ATTRIBUTE X_INTERFACE_INFO of gt_rxbyteisaligned : SIGNAL is "soleil:user:gtsfp:1.0 GT rxbyteisaligned";
ATTRIBUTE X_INTERFACE_INFO of gt_rxbyterealign : SIGNAL is "soleil:user:gtsfp:1.0 GT rxbyterealign";
ATTRIBUTE X_INTERFACE_INFO of gt_rxcommadet : SIGNAL is "soleil:user:gtsfp:1.0 GT rxcommadet";
ATTRIBUTE X_INTERFACE_INFO of gt_txfault : SIGNAL is "soleil:user:gtsfp:1.0 GT txfault";
ATTRIBUTE X_INTERFACE_INFO of gt_rxlos : SIGNAL is "soleil:user:gtsfp:1.0 GT rxlos";
ATTRIBUTE X_INTERFACE_INFO of gt_modabs : SIGNAL is "soleil:user:gtsfp:1.0 GT modabs";
ATTRIBUTE X_INTERFACE_INFO of gt_rstall : SIGNAL is "soleil:user:gtsfp:1.0 GT rstall";
ATTRIBUTE X_INTERFACE_INFO of gt_rxcommadeten : SIGNAL is "soleil:user:gtsfp:1.0 GT rxcommadeten";
ATTRIBUTE X_INTERFACE_INFO of gt_txdisable : SIGNAL is "soleil:user:gtsfp:1.0 GT txdisable";
ATTRIBUTE X_INTERFACE_INFO of rst_n : SIGNAL is "xilinx.com:signal:reset:1.0 rst_n RST";
ATTRIBUTE X_INTERFACE_PARAMETER of rst_n : SIGNAL is "POLARITY ACTIVE_LOW";
------------------------
-- SIGNAL DECLARATION --
------------------------
signal rst : std_logic;
signal tx_disable : std_logic;
signal rx_commadeten : std_logic;
signal srst_gt : std_logic;
signal frame_counter : std_logic_vector(15 downto 0);
signal frame_error : std_logic;
begin
-- Reset invert polarity
rst <= not rst_n;
axiitf_inst: entity work.combpm_protocol_electron_ctrl_axi
generic map(
G_ADDR_W => 8
)
port map(
sfp_txfault_i => gt_txfault,
sfp_rxlos_i => gt_rxlos,
sfp_modabs_i => gt_modabs,
sfp_txdisable_o => tx_disable,
gt_powergood_i => gt_powergood,
gt_qplllock_i => gt_qplllock,
gt_txclkactive_i => gt_txclkactive,
gt_rxclkactive_i => gt_rxclkactive,
gt_rxcdrlock_i => gt_rxcdrlock,
gt_txresetdone_i => gt_txresetdone,
gt_rxresetdone_i => gt_rxresetdone,
gt_rxbyteisaligned_i => gt_rxbyteisaligned,
gt_rxbyterealign_i => gt_rxbyterealign,
gt_rxcommadet_i => gt_rxcommadet,
gt_rxcommadeten_o => rx_commadeten,
gt_rstall_o => srst_gt,
protocol_framecnt_i => frame_counter,
protocol_frameerror_i => frame_error,
clk => clk,
reset => rst,
S_AXI_AWADDR => S_AXI_AWADDR,
S_AXI_AWPROT => S_AXI_AWPROT,
S_AXI_AWVALID => S_AXI_AWVALID,
S_AXI_AWREADY => S_AXI_AWREADY,
S_AXI_WDATA => S_AXI_WDATA,
S_AXI_WSTRB => S_AXI_WSTRB,
S_AXI_WVALID => S_AXI_WVALID,
S_AXI_WREADY => S_AXI_WREADY,
S_AXI_BRESP => S_AXI_BRESP,
S_AXI_BVALID => S_AXI_BVALID,
S_AXI_BREADY => S_AXI_BREADY,
S_AXI_ARADDR => S_AXI_ARADDR,
S_AXI_ARPROT => S_AXI_ARPROT,
S_AXI_ARVALID => S_AXI_ARVALID,
S_AXI_ARREADY => S_AXI_ARREADY,
S_AXI_RDATA => S_AXI_RDATA,
S_AXI_RRESP => S_AXI_RRESP,
S_AXI_RVALID => S_AXI_RVALID,
S_AXI_RREADY => S_AXI_RREADY
);
protocol_inst: entity work.combpm_protocol_electron
port map(
rst_n => rst_n,
clk => clk,
gt_datarx => gt_datarx,
gt_datatx => gt_datatx,
gt_powergood => gt_powergood,
gt_qplllock => gt_qplllock,
gt_txclkactive => gt_txclkactive,
gt_rxclkactive => gt_rxclkactive,
gt_txresetdone => gt_txresetdone,
gt_rxresetdone => gt_rxresetdone,
gt_rxcdrlock => gt_rxcdrlock,
gt_rxbyteisaligned => gt_rxbyteisaligned,
gt_rxbyterealign => gt_rxbyterealign,
gt_rxcommadet => gt_rxcommadet,
gt_txfault => gt_txfault,
gt_rxlos => gt_rxlos,
gt_modabs => gt_modabs,
gt_rstall => gt_rstall,
gt_rxcommadeten => gt_rxcommadeten,
gt_txdisable => gt_txdisable,
m_axi_tid => m_axi_tid,
m_axi_tdest => m_axi_tdest,
m_axi_tdata => m_axi_tdata,
m_axi_tstrb => m_axi_tstrb,
m_axi_tkeep => m_axi_tkeep,
m_axi_tlast => m_axi_tlast,
m_axi_tuser => m_axi_tuser,
m_axi_tvalid => m_axi_tvalid,
m_axi_tready => m_axi_tready,
tx_disable_i => tx_disable,
rx_commadeten_i => rx_commadeten,
srst_gt_i => srst_gt,
frame_counter_o => frame_counter,
frame_error_o => frame_error
);
end architecture struct;