From db8e72aec04a12e5271c093c70c8e6f13d60d5a4 Mon Sep 17 00:00:00 2001
From: Romain Broucquart <romain.broucquart@synchrotron-soleil.fr>
Date: Wed, 16 Feb 2022 08:59:18 +0100
Subject: [PATCH] Reduce the protocole decoder interface
* Remove unused signals
---
hdl/combpm_protocol_electron.vhd | 88 +++++---------------------
hdl/top_combpm_electron.vhd | 91 ++++++++++++---------------
rdl/combpm_protocol_electron_ctrl.rdl | 36 +++--------
3 files changed, 64 insertions(+), 151 deletions(-)
diff --git a/hdl/combpm_protocol_electron.vhd b/hdl/combpm_protocol_electron.vhd
index 52a18b2..273bbb8 100644
--- a/hdl/combpm_protocol_electron.vhd
+++ b/hdl/combpm_protocol_electron.vhd
@@ -3,9 +3,6 @@ library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
-library xpm;
-use xpm.vcomponents.all;
-
entity combpm_protocol_electron is
port(
rst_n : in std_logic;
@@ -13,23 +10,8 @@ entity combpm_protocol_electron is
-- GT interface
gt_datarx : in std_logic_vector(15 downto 0);
- gt_datatx : out std_logic_vector(15 downto 0);
- gt_powergood : in std_logic;
- gt_qplllock : in std_logic;
- gt_txclkactive : in std_logic;
- gt_rxclkactive : in std_logic;
- gt_txresetdone : in std_logic;
gt_rxresetdone : in std_logic;
- gt_rxcdrlock : in std_logic;
gt_rxbyteisaligned : in std_logic;
- gt_rxbyterealign : in std_logic;
- gt_rxcommadet : in std_logic;
- gt_txfault : in std_logic;
- gt_rxlos : in std_logic;
- gt_modabs : in std_logic;
- gt_rstall : out std_logic;
- gt_rxcommadeten : out std_logic;
- gt_txdisable : out std_logic;
-- AXIS interface
m_axi_tid : out std_logic_vector(0 downto 0);
@@ -43,52 +25,14 @@ entity combpm_protocol_electron is
m_axi_tready : in std_logic;
-- Status and control interface
- tx_disable_i : in std_logic;
- rx_commadeten_i : in std_logic;
- srst_gt_i : in std_logic;
- frame_counter_o : out std_logic_vector(15 downto 0);
- frame_error_o : out std_logic
+ soft_reset : in std_logic;
+ frame_counter : out std_logic_vector(15 downto 0);
+ frame_error : out std_logic
);
end entity combpm_protocol_electron;
architecture rtl of combpm_protocol_electron is
- --------------------------
- -- INTERFACE ATTRIBUTES --
- --------------------------
- ATTRIBUTE X_INTERFACE_INFO : STRING;
- ATTRIBUTE X_INTERFACE_PARAMETER : STRING;
-
- ATTRIBUTE X_INTERFACE_INFO of m_axi_tid : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TID";
- ATTRIBUTE X_INTERFACE_INFO of m_axi_tdest : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TDEST";
- ATTRIBUTE X_INTERFACE_INFO of m_axi_tdata : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TDATA";
- ATTRIBUTE X_INTERFACE_INFO of m_axi_tstrb : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TSTRB";
- ATTRIBUTE X_INTERFACE_INFO of m_axi_tkeep : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TKEEP";
- ATTRIBUTE X_INTERFACE_INFO of m_axi_tlast : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TLAST";
- ATTRIBUTE X_INTERFACE_INFO of m_axi_tuser : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TUSER";
- ATTRIBUTE X_INTERFACE_INFO of m_axi_tvalid : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TVALID";
- ATTRIBUTE X_INTERFACE_INFO of m_axi_tready : SIGNAL is "xilinx.com:interface:axis:1.0 M_AXI TREADY";
-
- ATTRIBUTE X_INTERFACE_INFO of gt_datarx : SIGNAL is "soleil:user:gtsfp:1.0 GT datarx";
- ATTRIBUTE X_INTERFACE_INFO of gt_datatx : SIGNAL is "soleil:user:gtsfp:1.0 GT datatx";
- ATTRIBUTE X_INTERFACE_INFO of gt_powergood : SIGNAL is "soleil:user:gtsfp:1.0 GT powergood";
- ATTRIBUTE X_INTERFACE_INFO of gt_qplllock : SIGNAL is "soleil:user:gtsfp:1.0 GT qplllock";
- ATTRIBUTE X_INTERFACE_INFO of gt_txclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT txclkactive";
- ATTRIBUTE X_INTERFACE_INFO of gt_rxclkactive : SIGNAL is "soleil:user:gtsfp:1.0 GT rxclkactive";
- ATTRIBUTE X_INTERFACE_INFO of gt_txresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT txresetdone";
- ATTRIBUTE X_INTERFACE_INFO of gt_rxresetdone : SIGNAL is "soleil:user:gtsfp:1.0 GT rxresetdone";
- ATTRIBUTE X_INTERFACE_INFO of gt_rxcdrlock : SIGNAL is "soleil:user:gtsfp:1.0 GT rxcdrlock";
- ATTRIBUTE X_INTERFACE_INFO of gt_rxbyteisaligned : SIGNAL is "soleil:user:gtsfp:1.0 GT rxbyteisaligned";
- ATTRIBUTE X_INTERFACE_INFO of gt_rxbyterealign : SIGNAL is "soleil:user:gtsfp:1.0 GT rxbyterealign";
- ATTRIBUTE X_INTERFACE_INFO of gt_rxcommadet : SIGNAL is "soleil:user:gtsfp:1.0 GT rxcommadet";
- ATTRIBUTE X_INTERFACE_INFO of gt_txfault : SIGNAL is "soleil:user:gtsfp:1.0 GT txfault";
- ATTRIBUTE X_INTERFACE_INFO of gt_rxlos : SIGNAL is "soleil:user:gtsfp:1.0 GT rxlos";
- ATTRIBUTE X_INTERFACE_INFO of gt_modabs : SIGNAL is "soleil:user:gtsfp:1.0 GT modabs";
-
- ATTRIBUTE X_INTERFACE_INFO of rst_n : SIGNAL is "xilinx.com:signal:reset:1.0 rst_n RST";
- ATTRIBUTE X_INTERFACE_PARAMETER of rst_n : SIGNAL is "POLARITY ACTIVE_LOW";
-
-
--------------------------
-- CONSTANT DECLARATION --
--------------------------
@@ -101,7 +45,6 @@ architecture rtl of combpm_protocol_electron is
------------------------
-- SIGNAL DECLARATION --
------------------------
- signal S_AXI_RESET : std_logic;
signal packet_reg : std_logic_vector(14*16-1 downto 0); -- Register to hold one packet
signal flag_sop_inc : std_logic;
@@ -128,7 +71,7 @@ architecture rtl of combpm_protocol_electron is
signal crc_cnt : unsigned(3 downto 0);
signal d : std_logic_vector(15 downto 0);
- signal frame_counter : unsigned(15 downto 0);
+ signal frame_counter_r : unsigned(15 downto 0);
signal gt_rxcommadeten_s : std_logic;
signal itf_ready : std_logic;
@@ -325,28 +268,25 @@ begin
------------------------
-- CONTROL AND STATUS --
------------------------
- frame_error_o <= flag_any xor flag_all;
- frame_counter_o <= std_logic_vector(frame_counter);
- itf_ready <= gt_txresetdone and gt_rxresetdone and gt_powergood and gt_qplllock
- and gt_rxbyteisaligned and (not srst_gt_i);
+ frame_error <= flag_any xor flag_all;
+ frame_counter <= std_logic_vector(frame_counter_r);
+ itf_ready <= gt_rxresetdone and gt_rxbyteisaligned;
-- frame counter
p_framecnt:process(clk, rst_n)
begin
if rst_n = '0' then
- frame_counter <= (others => '0');
+ frame_counter_r <= (others => '0');
elsif rising_edge(clk) then
- if flag_all = '1' then
- frame_counter <= frame_counter+1;
+ if soft_reset = '1' then
+ frame_counter_r <= (others => '0');
+ else
+ if flag_all = '1' then
+ frame_counter_r <= frame_counter_r+1;
+ end if;
end if;
end if;
end process p_framecnt;
-
- -- Direct connexion to GT/SFP
- gt_txdisable <= tx_disable_i;
- gt_rstall <= srst_gt_i;
- gt_rxcommadeten <= rx_commadeten_i;
-
end architecture rtl;
diff --git a/hdl/top_combpm_electron.vhd b/hdl/top_combpm_electron.vhd
index b7968ec..005a3df 100644
--- a/hdl/top_combpm_electron.vhd
+++ b/hdl/top_combpm_electron.vhd
@@ -6,6 +6,10 @@ library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
+library xpm;
+use xpm.vcomponents.all;
+
+
entity top_combpm_electron is
port(
@@ -147,67 +151,72 @@ architecture struct of top_combpm_electron is
------------------------
-- SIGNAL DECLARATION --
------------------------
+ signal sync_resetn : std_logic;
+ signal sync_reset : std_logic;
signal usrclk : std_logic;
signal rst : std_logic;
- signal tx_disable : std_logic;
- signal rx_commadeten : std_logic;
signal frame_counter : std_logic_vector(15 downto 0);
signal frame_error : std_logic;
+ signal soft_reset : std_logic;
signal gt_datarx : std_logic_vector(15 downto 0);
- signal gt_datatx : std_logic_vector(15 downto 0);
signal gt_powergood : std_logic;
- signal gt_txclkactive : std_logic;
+ signal gt_qplllock : std_logic;
signal gt_rxclkactive : std_logic;
- signal gt_txresetdone : std_logic;
+ signal gt_rxcdrlock : std_logic;
signal gt_rxresetdone : std_logic;
signal gt_rxbyteisaligned : std_logic;
signal gt_rxbyterealign : std_logic;
signal gt_rxcommadet : std_logic;
- signal gt_txfault : std_logic;
- signal gt_rxlos : std_logic;
- signal gt_modabs : std_logic;
- signal gt_rstall : std_logic;
signal gt_rxcommadeten : std_logic;
- signal gt_txdisable : std_logic;
- signal gt_rxcdrlock : std_logic;
signal gt_rxresetdatapath : std_logic;
begin
+ xpm_cdc_async_rst_inst : xpm_cdc_async_rst
+ generic map (
+ DEST_SYNC_FF => 4,
+ INIT_SYNC_FF => 0,
+ RST_ACTIVE_HIGH => 0 -- DECIMAL; 0=active low reset, 1=active high reset
+ )
+ port map (
+ dest_arst => sync_resetn,
+ dest_clk => usrclk,
+ src_arst => rst_n
+ );
+
+
-- Reset invert polarity
rst <= not rst_n;
+ sync_reset <= not sync_resetn;
----------------------
-- AXI-MM INTERFACE --
----------------------
- axiitf_inst: entity work.combpm_protocol_electron_ctrl_axi
+ axiitf_inst: entity work.combpm_ctrl_axi
generic map(
G_ADDR_W => 8
)
port map(
- sfp_txfault_i => gt_txfault,
- sfp_rxlos_i => gt_rxlos,
- sfp_modabs_i => gt_modabs,
- sfp_txdisable_o => tx_disable,
+ sfp_rxlos_i => sfp_rx_los,
+ sfp_modabs_i => sfp_mod_abs,
gt_powergood_i => gt_powergood,
- gt_qplllock_i => qpll_lock,
- gt_txclkactive_i => gt_txclkactive,
+ gt_qplllock_i => gt_qplllock,
gt_rxclkactive_i => gt_rxclkactive,
gt_rxcdrlock_i => gt_rxcdrlock,
- gt_txresetdone_i => gt_txresetdone,
gt_rxresetdone_i => gt_rxresetdone,
gt_rxbyteisaligned_i => gt_rxbyteisaligned,
gt_rxbyterealign_i => gt_rxbyterealign,
gt_rxcommadet_i => gt_rxcommadet,
- gt_rxcommadeten_o => rx_commadeten,
+ gt_rxcommadeten_o => gt_rxcommadeten,
gt_rxrstdatapath_o => gt_rxresetdatapath,
protocol_framecnt_i => frame_counter,
protocol_frameerror_i => frame_error,
+ protocol_softreset_o => soft_reset,
clk => usrclk,
- reset => rst,
+ reset => sync_reset,
S_AXI_AWADDR => S_AXI_AWADDR,
S_AXI_AWPROT => S_AXI_AWPROT,
S_AXI_AWVALID => S_AXI_AWVALID,
@@ -234,26 +243,11 @@ begin
--------------------------------------
protocol_inst: entity work.combpm_protocol_electron
port map(
- rst_n => rst_n,
+ rst_n => sync_resetn,
clk => usrclk,
gt_datarx => gt_datarx,
- gt_datatx => gt_datatx,
- gt_powergood => gt_powergood,
- gt_qplllock => qpll_lock,
- gt_txclkactive => gt_txclkactive,
- gt_rxclkactive => gt_rxclkactive,
- gt_txresetdone => gt_txresetdone,
gt_rxresetdone => gt_rxresetdone,
- gt_rxcdrlock => gt_rxcdrlock,
gt_rxbyteisaligned => gt_rxbyteisaligned,
- gt_rxbyterealign => gt_rxbyterealign,
- gt_rxcommadet => gt_rxcommadet,
- gt_txfault => gt_txfault,
- gt_rxlos => gt_rxlos,
- gt_modabs => gt_modabs,
- gt_rstall => gt_rstall,
- gt_rxcommadeten => gt_rxcommadeten,
- gt_txdisable => gt_txdisable,
m_axi_tid => m_axis_tid,
m_axi_tdest => m_axis_tdest,
@@ -265,11 +259,9 @@ begin
m_axi_tvalid => m_axis_tvalid,
m_axi_tready => m_axis_tready,
- tx_disable_i => tx_disable,
- rx_commadeten_i => rx_commadeten,
- srst_gt_i => gt_rxresetdatapath,
- frame_counter_o => frame_counter,
- frame_error_o => frame_error
+ soft_reset => soft_reset,
+ frame_counter => frame_counter,
+ frame_error => frame_error
);
@@ -287,8 +279,8 @@ begin
gtwiz_reset_clk_freerun_in(0) => free_100_clk,
-- Clock and data
- gtwiz_userclk_rx_usrclk_out(0) => usrclk,
- gtwiz_userdata_tx_in => gt_datatx,
+ gtwiz_userclk_rx_usrclk2_out(0) => usrclk,
+ gtwiz_userdata_tx_in => (others => '0'),
gtwiz_userdata_rx_out => gt_datarx,
-- QPLL COMMON
@@ -310,9 +302,9 @@ begin
gtwiz_reset_rx_pll_and_datapath_in => "0",
-- Status
- gtwiz_userclk_tx_active_out(0) => gt_txclkactive,
+ gtwiz_userclk_tx_active_out => open,
gtwiz_userclk_rx_active_out(0) => gt_rxclkactive,
- gtwiz_reset_tx_done_out(0) => gt_txresetdone,
+ gtwiz_reset_tx_done_out => open,
gtwiz_reset_rx_done_out(0) => gt_rxresetdone,
gtpowergood_out(0) => gt_powergood,
rxbyteisaligned_out(0) => gt_rxbyteisaligned,
@@ -335,7 +327,7 @@ begin
qpll0refclk_in => "0", -- not used
gtwiz_reset_rx_cdr_stable_out => open, -- Do not use
gtwiz_userclk_rx_srcclk_out => open,
- gtwiz_userclk_rx_usrclk2_out => open,
+ gtwiz_userclk_rx_usrclk_out => open,
rxctrl0_out => open,
rxctrl1_out => open,
rxctrl2_out => open,
@@ -351,9 +343,6 @@ begin
clk <= usrclk;
-- SFP direct connexion
- gt_txfault <= sfp_tx_fault;
- gt_rxlos <= sfp_rx_los;
- gt_modabs <= sfp_mod_abs;
- sfp_tx_disable <= gt_txdisable;
+ sfp_tx_disable <= '1';
end architecture struct;
diff --git a/rdl/combpm_protocol_electron_ctrl.rdl b/rdl/combpm_protocol_electron_ctrl.rdl
index 1bfcf92..7e9b47a 100644
--- a/rdl/combpm_protocol_electron_ctrl.rdl
+++ b/rdl/combpm_protocol_electron_ctrl.rdl
@@ -1,18 +1,12 @@
-addrmap combpm_protocol_electron_ctrl {
+addrmap combpm_ctrl {
- name="BPM Electron protocol decoder controller";
+ name="BPM protocol decoder controller";
reg {
name="SFP status and control";
- field {
- desc="SFP TX fault signal";
- hw=w;
- sw=r;
- } TXFAULT;
-
field {
desc="SFP RX lost signal";
hw=w;
@@ -25,11 +19,6 @@ addrmap combpm_protocol_electron_ctrl {
sw=r;
} MODABS;
- field {
- desc="SFP TX disable signal";
- hw=r;
- sw=rw;
- } TXDISABLE = 0;
} SFP;
@@ -48,12 +37,6 @@ addrmap combpm_protocol_electron_ctrl {
sw=r;
} QPLLLOCK;
- field {
- desc="TX clk active signal";
- hw=w;
- sw=r;
- } TXCLKACTIVE;
-
field {
desc="RX clk active signal";
hw=w;
@@ -66,12 +49,6 @@ addrmap combpm_protocol_electron_ctrl {
sw=r;
} RXCDRLOCK;
- field {
- desc="TX reset done signal";
- hw=w;
- sw=r;
- } TXRESETDONE;
-
field {
desc="RX reset done signal";
hw=w;
@@ -120,10 +97,17 @@ addrmap combpm_protocol_electron_ctrl {
} FRAMECNT[16];
field {
- desc="Frame counter";
+ desc="Frame error";
hw=w;
sw=r;
} FRAMEERROR;
+
+ field {
+ desc="Soft reset";
+ hw=r;
+ sw=rw;
+ } SOFTRESET;
+
} PROTOCOL;
};
--
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