From abcd6a7c1a6631da7996579afa8748f4a6de1988 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Romain=20Bron=C3=A8s?= <romain.brones@synchrotron-soleil.fr>
Date: Mon, 23 Oct 2023 16:56:19 +0200
Subject: [PATCH] fix: Add rising edge filter on PPS
* Sometimes 0 were read on the AXI interface. Hopefully this fixes this.
---
hdl/combpm_protocol_electron.vhd | 28 +++++++++++++++++-----------
1 file changed, 17 insertions(+), 11 deletions(-)
diff --git a/hdl/combpm_protocol_electron.vhd b/hdl/combpm_protocol_electron.vhd
index c36c6ac..214f3b6 100644
--- a/hdl/combpm_protocol_electron.vhd
+++ b/hdl/combpm_protocol_electron.vhd
@@ -84,6 +84,8 @@ architecture rtl of combpm_protocol_electron is
signal packet : t_bpmpacket;
signal m_axi_tvalid : std_logic;
+ signal pps_r : std_logic;
+
begin
@@ -276,19 +278,23 @@ begin
p_framecnt:process(clk, rst_n)
begin
if rst_n = '0' then
- cnt_frame_seq_r <= (others => '0');
- cnt_valid_r <= (others => '0');
- cnt_invalid_r <= (others => '0');
- rate_valid_r <= (others => '0');
- rate_invalid_r <= (others => '0');
- frame_valid_rate<= (others => '0');
- frame_invalid_rate<= (others => '0');
- last_seq <= (others => '0');
- last_cnt_seq_r <= (others => '0');
- seq_discontinuity <= '0';
+ cnt_frame_seq_r <= (others => '0');
+ cnt_valid_r <= (others => '0');
+ cnt_invalid_r <= (others => '0');
+ rate_valid_r <= (others => '0');
+ rate_invalid_r <= (others => '0');
+ frame_valid_rate <= (others => '0');
+ frame_invalid_rate <= (others => '0');
+ last_seq <= (others => '0');
+ last_cnt_seq_r <= (others => '0');
+ seq_discontinuity <= '0';
cnt_seq_mismatch <= '0';
+ pps_r <= '0';
elsif rising_edge(clk) then
+ -- Register for rising edge filter
+ pps_r <= pps;
+
if soft_reset = '1' then
cnt_frame_seq_r <= (others => '0');
cnt_valid_r <= (others => '0');
@@ -313,7 +319,7 @@ begin
end if;
-- Rate counter
- if pps = '1' then
+ if pps = '1' and pps_r = '0' then
frame_valid_rate <= std_logic_vector(rate_valid_r);
frame_invalid_rate <= std_logic_vector(rate_invalid_r);
rate_valid_r <= (others => '0');
--
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