From 2f6e5d644b785a0b539493be52fd08d7e1ae38a0 Mon Sep 17 00:00:00 2001
From: Romain Broucquart <romain.broucquart@synchrotron-soleil.fr>
Date: Tue, 4 Oct 2022 10:04:45 +0200
Subject: [PATCH] Change naming from BPMFRAME to BPMPACKET
* Change the naming in the package and HDL.
* Complete and correct the doc.
---
doc/images/combpm_packet_filter.svg | 450 ++++++++++++++++++
doc/main.adoc | 63 ++-
hdl/combpm_packet_filter.vhd | 14 +-
hdl/combpm_protocol_electron.vhd | 12 +-
...me_stream.vhd => pkg_bpmpacket_stream.vhd} | 44 +-
hdl/top_combpm_electron.vhd | 6 +-
tcl/main.tcl | 2 +-
7 files changed, 544 insertions(+), 47 deletions(-)
create mode 100644 doc/images/combpm_packet_filter.svg
rename hdl/{pkg_bpmframe_stream.vhd => pkg_bpmpacket_stream.vhd} (71%)
diff --git a/doc/images/combpm_packet_filter.svg b/doc/images/combpm_packet_filter.svg
new file mode 100644
index 0000000..dbbe1a2
--- /dev/null
+++ b/doc/images/combpm_packet_filter.svg
@@ -0,0 +1,450 @@
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diff --git a/doc/main.adoc b/doc/main.adoc
index dd1f92a..22a2b8a 100644
--- a/doc/main.adoc
+++ b/doc/main.adoc
@@ -37,7 +37,43 @@ image::images/overview.svg[]
The module provide additionnal blocs usefull for the application.
-* Frame filter
+* Packet filter
+
+=== Package
+
+A package describing the AXIS packet at the module output is present.
+It helps to automatically pack or unpack the packet (functions _bpmpacket2slv()_ or _slv2bpmpacket()_ ).
+A zero packet (_C_BPMPACKET_ZERO) is also declared.
+
+.t_bpmpacket record type
+[cols="1,1,1"]
+[%autowidth]
+|===
+|Member name | Type | Description
+
+|pos_x | std_logic_vector(31 downto 0) | X position
+|pos_y | std_logic_vector(31 downto 0) | Y position
+|bpm_id | std_logic_vector(15 downto 0) | ID of the source BPM
+|mc_timestamp | std_logic_vector(39 downto 0) | Timestamp at machine clock frequency
+|fa_seq | std_logic_vector(7 downto 0) | FA sequence number, LSB only
+|===
+
+.Some usage of pkg_bpmpacket.vhd
+[example]
+[source,vhdl]
+----
+ signal my_packet : t_bpmpacket;
+
+(...)
+
+ my_packet <= slv2bpmpacket(axis_tdata); -- Convert from AXIS tdata to a BPM packet
+
+ id <= my_packet.bpm_id; -- Access packet fields
+ pos_x <= my_packet.pos_x;
+
+ axis_tdata_o <= bpmpacket(my_packet); -- Convert back to logic vector for AXIS tdata
+----
+
// ================================================================================
== Details
@@ -49,15 +85,15 @@ The module provide additionnal blocs usefull for the application.
* DLS CC Sequence number check. If discontinuous: pulse seq_discontinuity output and increase
-=== BPM frame AXIS stream
+=== BPM packet AXIS stream
-The AXIS data provided by the protocol decoder is descibed in the file _pkg_bpmframe_stream.vhd_.
+The AXIS data provided by the protocol decoder is descibed in the file _pkg_bpmpacket_stream.vhd_.
See this file to have up to date fields info.
-* Frames are not cut into packets (TLAST always '1').
+* Packets are not cut into packets (TLAST always '1').
* No FIFO on output (TREADY is not used).
-The application needs to either implement FIFO or accepts every frame (AXIS packet).
-The frame rate depends on the signal input.
+The application needs to either implement FIFO or accepts every packet (AXIS packet).
+The packet rate depends on the signal input.
=== Transceivers
@@ -67,9 +103,20 @@ The TCL script combpm_gtwizard.tcl is used to create the GTWizard IP, wich is in
We use DESYRDL to generate a AXI4L slave decoder.
-=== Frame filter
+=== Packet filter
+
+This block can drop BPM packets from the AXIS by looking up their BPM_ID field.
+A simple memory block is used and programmed via the AXI-MM interface.
+The block is adressed by the BPM ID (0 to 255).
+
+The msb (bit 7) gives the forward signal.
+If '1' then the packet is transfered, else it is blocked.
+
+The 6 lsb (bit 6-0) is filled into the TDEST field of the AXIS stream.
+This can be used to further routing.
-*To be completed...*
+.Structural schematic of combpm_packet_filter.
+image::images/combpm_packet_filter.svg[]
// ================================================================================
== TODO/Future of this module
diff --git a/hdl/combpm_packet_filter.vhd b/hdl/combpm_packet_filter.vhd
index 934cb0e..211ae59 100644
--- a/hdl/combpm_packet_filter.vhd
+++ b/hdl/combpm_packet_filter.vhd
@@ -2,7 +2,7 @@ library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
-use work.pkg_bpmframe_stream.all;
+use work.pkg_bpmpacket_stream.all;
entity combpm_packet_filter is
generic(
@@ -133,8 +133,8 @@ architecture rtl of combpm_packet_filter is
------------------------
-- SIGNAL DECLARATION --
------------------------
- signal in_packet : t_bpmframe;
- signal out_packet : t_bpmframe;
+ signal in_packet : t_bpmpacket;
+ signal out_packet : t_bpmpacket;
signal bram_clk_a : STD_LOGIC;
signal bram_en_a : STD_LOGIC;
@@ -161,13 +161,13 @@ begin
p_main: process(axis_clk, axis_rst_n)
begin
if axis_rst_n = '0' then
- in_packet <= slv2bpmframe(zero_packet);
- out_packet <= slv2bpmframe(zero_packet);
+ in_packet <= slv2bpmpacket(zero_packet);
+ out_packet <= slv2bpmpacket(zero_packet);
elsif rising_edge(axis_clk) then
-- Register input packet
if s_axis_tvalid = '1' then
- in_packet <= slv2bpmframe(s_axis_tdata);
+ in_packet <= slv2bpmpacket(s_axis_tdata);
end if;
tvalid_r(tvalid_r'left downto 1) <= tvalid_r(tvalid_r'left-1 downto 0);
@@ -182,7 +182,7 @@ begin
-- AXIS OUTPUT --
-----------------
m_axis_tdest <= std_logic_vector(resize(unsigned(table_data(6 downto 0)), C_TDEST_W));
- m_axis_tdata <= bpmframe2slv(out_packet);
+ m_axis_tdata <= bpmpacket2slv(out_packet);
m_axis_tlast <= '1'; -- Packet is one tdata only
m_axis_tvalid <= tvalid_r(tvalid_r'left) and table_data(7);
diff --git a/hdl/combpm_protocol_electron.vhd b/hdl/combpm_protocol_electron.vhd
index 7e1751c..aed7621 100644
--- a/hdl/combpm_protocol_electron.vhd
+++ b/hdl/combpm_protocol_electron.vhd
@@ -3,7 +3,7 @@ library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
-use work.pkg_bpmframe_stream.all;
+use work.pkg_bpmpacket_stream.all;
entity combpm_protocol_electron is
port(
@@ -17,8 +17,8 @@ entity combpm_protocol_electron is
gt_datarx : in std_logic_vector(15 downto 0); -- Deserialized data.
-- AXIS interface
- m_axis_m2s : out t_bpmframe_axis_m2s;
- m_axis_s2m : in t_bpmframe_axis_s2m;
+ m_axis_m2s : out t_bpmpacket_axis_m2s;
+ m_axis_s2m : in t_bpmpacket_axis_s2m;
-- Status and control interface
soft_reset : in std_logic; -- Reset all counters.
@@ -82,7 +82,7 @@ architecture rtl of combpm_protocol_electron is
signal rate_valid_r : unsigned(31 downto 0);
signal rate_invalid_r : unsigned(31 downto 0);
- signal packet : t_bpmframe;
+ signal packet : t_bpmpacket;
signal m_axi_tvalid : std_logic;
@@ -236,7 +236,7 @@ begin
-- AXIS OUT --
--------------
m_axis_m2s.tdest <= (others => '0');
- m_axis_m2s.tdata <= bpmframe2slv(packet);
+ m_axis_m2s.tdata <= bpmpacket2slv(packet);
m_axis_m2s.tlast <= '1'; -- One transfer is One packet.
m_axis_m2s.tvalid <= m_axi_tvalid;
@@ -244,7 +244,7 @@ begin
p_axis:process(clk, rst_n)
begin
if rst_n = '0' then
- packet <= C_BPMFRAME_ZERO;
+ packet <= C_BPMPACKET_ZERO;
m_axi_tvalid <= '0';
elsif rising_edge(clk) then
diff --git a/hdl/pkg_bpmframe_stream.vhd b/hdl/pkg_bpmpacket_stream.vhd
similarity index 71%
rename from hdl/pkg_bpmframe_stream.vhd
rename to hdl/pkg_bpmpacket_stream.vhd
index 5f8426a..4bda9ea 100644
--- a/hdl/pkg_bpmframe_stream.vhd
+++ b/hdl/pkg_bpmpacket_stream.vhd
@@ -1,14 +1,14 @@
--- Package BPMFRAME STREAM
+-- Package BPMPACKET STREAM
-- this package describe the format of the AXI-Stream interface used by blocs of the module COMBPM.
--
-- The usefull things are :
--- * Two record types for port interfaces: t_bpmframe_axis_m2s and t_bpmframe_axis_s2m.
--- * One record type for frame fields: t_bpmframe.
--- * Two functions to transform TDATA (std_logic_vector) to/from t_bpmframe: slv2bpmframe and bpmframe2slv.
+-- * Two record types for port interfaces: t_bpmpacket_axis_m2s and t_bpmpacket_axis_s2m.
+-- * One record type for frame fields: t_bpmpacket.
+-- * Two functions to transform TDATA (std_logic_vector) to/from t_bpmpacket: slv2bpmpacket and bpmpacket2slv.
library ieee;
use ieee.std_logic_1164.all;
-package pkg_bpmframe_stream is
+package pkg_bpmpacket_stream is
----------------------
-- MACRO PARAMETERS --
@@ -19,29 +19,29 @@ package pkg_bpmframe_stream is
---------------------------------
-- AXIS MASTER/SLAVE INTERFACE --
---------------------------------
- type t_bpmframe_axis_m2s is record
+ type t_bpmpacket_axis_m2s is record
tdest : std_logic_vector(C_TDEST_W-1 downto 0);
tdata : std_logic_vector(C_TDATA_W-1 downto 0);
tlast : std_logic;
tvalid : std_logic;
- end record t_bpmframe_axis_m2s;
+ end record t_bpmpacket_axis_m2s;
- type t_bpmframe_axis_s2m is record
+ type t_bpmpacket_axis_s2m is record
tready : std_logic;
- end record t_bpmframe_axis_s2m;
+ end record t_bpmpacket_axis_s2m;
------------------------
-- AXIS STREAM PACKET --
------------------------
- type t_bpmframe is record
+ type t_bpmpacket is record
pos_x : std_logic_vector(31 downto 0);
pos_y : std_logic_vector(31 downto 0);
bpm_id : std_logic_vector(15 downto 0);
mc_timestamp : std_logic_vector(39 downto 0);
fa_seq : std_logic_vector(7 downto 0);
- end record t_bpmframe;
+ end record t_bpmpacket;
- constant C_BPMFRAME_ZERO : t_bpmframe := (
+ constant C_BPMPACKET_ZERO : t_bpmpacket := (
pos_x => (others => '0'),
pos_y => (others => '0'),
bpm_id => (others => '0'),
@@ -49,27 +49,27 @@ package pkg_bpmframe_stream is
fa_seq => (others => '0')
);
- function slv2bpmframe(
+ function slv2bpmpacket(
signal tdata : std_logic_vector(C_TDATA_W-1 downto 0)
)
- return t_bpmframe;
+ return t_bpmpacket;
- function bpmframe2slv(
- signal packet : t_bpmframe
+ function bpmpacket2slv(
+ signal packet : t_bpmpacket
)
return std_logic_vector;
end package;
-package body pkg_bpmframe_stream is
+package body pkg_bpmpacket_stream is
- function slv2bpmframe(
+ function slv2bpmpacket(
signal tdata : std_logic_vector(C_TDATA_W-1 downto 0)
)
- return t_bpmframe is
- variable packet : t_bpmframe;
+ return t_bpmpacket is
+ variable packet : t_bpmpacket;
begin
packet.pos_x := tdata(31 downto 0);
packet.pos_y := tdata(63 downto 32);
@@ -79,8 +79,8 @@ package body pkg_bpmframe_stream is
return packet;
end function;
- function bpmframe2slv(
- signal packet : t_bpmframe
+ function bpmpacket2slv(
+ signal packet : t_bpmpacket
)
return std_logic_vector is
begin
diff --git a/hdl/top_combpm_electron.vhd b/hdl/top_combpm_electron.vhd
index d498d22..9947b27 100644
--- a/hdl/top_combpm_electron.vhd
+++ b/hdl/top_combpm_electron.vhd
@@ -13,7 +13,7 @@ library desyrdl;
use desyrdl.common.all;
use desyrdl.pkg_combpm.all;
-use work.pkg_bpmframe_stream.all;
+use work.pkg_bpmpacket_stream.all;
use work.pkg_combpm_version.all;
entity top_combpm_electron is
@@ -47,8 +47,8 @@ entity top_combpm_electron is
sfp_tx_fault : in std_logic;
-- AXIS interface
- m_axis_m2s : out t_bpmframe_axis_m2s;
- m_axis_s2m : in t_bpmframe_axis_s2m; -- warning: TREADY is ignored !
+ m_axis_m2s : out t_bpmpacket_axis_m2s;
+ m_axis_s2m : in t_bpmpacket_axis_s2m; -- warning: TREADY is ignored !
-- AXI bus interface
pi_s_top : in t_COMBPM_m2s;
diff --git a/tcl/main.tcl b/tcl/main.tcl
index f07eb1f..8cf237e 100644
--- a/tcl/main.tcl
+++ b/tcl/main.tcl
@@ -21,7 +21,7 @@ proc setSources {} {
lappend Vhdl ../hdl/pkg_combpm_version.vhd
lappend Vhdl ../hdl/combpm_protocol_electron.vhd
lappend Vhdl ../hdl/top_combpm_electron.vhd
- lappend Vhdl ../hdl/pkg_bpmframe_stream.vhd
+ lappend Vhdl ../hdl/pkg_bpmpacket_stream.vhd
lappend Vhdl ../hdl/combpm_packet_filter.vhd
}
--
GitLab